NDLI: System level interconnect electrical performance characterization

Content Provider	IEEE Xplore Digital Library
Author	Su, T. Hsu, J. Kai Xiao Li, Y.L.
Copyright Year	2015
Description	Author affiliation: DEG, Intel Corp., DuPont, WA, USA (Kai Xiao) \|\| DEG, Intel Microelectron. Asia Ltd., Taipei, Taiwan (Su, T.; Hsu, J.; Li, Y.L.)
Abstract	In PC/Server industry, simulation process is usually separated into pre-layout and post-layout phase. The pre-layout simulation focus in finding the solution space or choosing a better topology [1], [2]. For post-layout simulation, extracting 3 or 5 pairs of the channel model and conducting the simulation analysis is widely used. However, it requires a basic understanding of the layout. Otherwise the channel which is extracted may not be the best one to represent the worst scenario in the reality. The system level interconnect electrical performance characterization, which can consider a whole interface or even multiple interfaces, become an efficient way, especially estimating the risk of an out-of-guideline design. In this paper, a process with less human interaction is demonstrated. This method can relief the burden in choosing the representative channel from the layout and allow the designer to focus in improving the layout quality in these problematic areas.
Starting Page	12
Ending Page	15
File Size	548616
Page Count	4
File Format	PDF
ISBN	9781479966684
e-ISBN	9781479966707
DOI	10.1109/APEMC.2015.7175350
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-05-26
Publisher Place	Taiwan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Couplings Frequency-domain analysis Delay effects Layout Crosstalk Servers Time-domain analysis
Content Type	Text
Resource Type	Article

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2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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