NDLI: Frequency compensation in two-stage operational amplifiers for achieving high 3-dB bandwidth

Content Provider	IEEE Xplore Digital Library
Author	Malhotra, S. Mishra, A. Rakesh, B.R. Gupta, A.
Copyright Year	2013
Description	Author affiliation: Electr. & Electron., BITS Pilani, Pilani, India (Malhotra, S.; Mishra, A.; Rakesh, B.R.; Gupta, A.)
Abstract	A frequency compensation technique for achieving high 3-dB bandwidth in two-stage operational amplifiers is demonstrated in this paper. Due to the phenomenon of pole splitting in Miller's Compensation technique in classical op-amp, the 3-dB bandwidth reduces drastically. The technique demonstrated in this paper is a modification of Miller's Compensation technique to achieve a significant improvement in the 3-dB bandwidth by introducing an extra stage, consisting of MOS transistors (MOST). The coupling capacitor and a PMOS transistor operating in triode region is connected between the output of the extra stage and the input of the second stage. The simulations were carried out in Cadence VIRTUOSO environment using 0.18 μm CMOS process technology.
Sponsorship	IEEE Circuits Syst. Soc.
Starting Page	107
Ending Page	110
File Size	519183
Page Count	4
File Format	PDF
e-ISBN	9781479927517
DOI	10.1109/PrimeAsia.2013.6731187
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-12-19
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Operational amplifiers Couplings MOSFET Two-Stage Operational Amplifier Capacitors Bandwidth Frequency Compensation CMOS integrated circuits Coupling Capacitor Gain 3-dB Bandwidth Phase Margin
Content Type	Text
Resource Type	Article

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