NDLI: Modular design of SC3DMC based on MPEG reconfigurable graphics coding framework

Content Provider	IEEE Xplore Digital Library
Author	Hyerin Lim Hyungyu Kim Sinwook Lee Sowon Kim Seungwook Lee Bon-ki Koo Jang, E.S.
Copyright Year	2012
Description	Author affiliation: Digital Media Laboratory, Department of Electronics and Computer Engineering, Hanyang University, Seoul, Korea (Hyerin Lim; Hyungyu Kim; Sinwook Lee; Sowon Kim; Jang, E.S.) \|\| Electronics and Telecommunications Research Institute, Daejeon, Korea (Seungwook Lee; Bon-ki Koo)
Abstract	MPEG reconfigurable media coding (RMC) is a standardization activity in MPEG to provide a modular design framework for the existing MPEG multimedia coding standards. The objective of the modularization is to allow easy development, maintenance, and reuse of the coding tools in the standards. We observed that the concept of RMC is suitable for the 3D graphics coding. Since there are many overlapping object types (e.g., IndexedFaceSet in VRML, Mesh in Collada) in 3D graphics, the MPEG RMC framework can cover everything, from object type definition to object compression, in a modularized approach [1]. In this paper, we provide a walkthrough on the use of the RGC framework with the primitive-level FUs based on existing graphics coding standards such as MPEG scalable complexity 3D mesh coding (SC3DMC).
Starting Page	498
Ending Page	502
File Size	1664985
Page Count	5
File Format	PDF
ISBN	9781467322010
e-ISBN	9781467322041
DOI	10.1109/ICNIDC.2012.6418803
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-09-21
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Graphics Scalable Complexity 3D Mesh Coding Transform coding ISO standards Quantization Encoding Primitive-level FU Decoding Reconfigurable Graphics Coding
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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