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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Lin Cong Hoi Lee |
| Copyright Year | 2015 |
| Description | Author affiliation: Dept. of Electr. Eng., Univ. of Texas at Dallas Richardson, Dallas, TX, USA (Lin Cong; Hoi Lee) |
| Abstract | This paper presents techniques for high-voltage isolated converters to achieve high power efficiency at high switching frequencies. To minimize the converter switching loss, an isolated quasi-square-wave zero-voltage switching three-level half-bridge architecture is adopted. An integrated synchronous three-level gate driver is proposed to ensure reliability of all eGaN power FETs and provide fast propagation delays for high-frequency converter operation. Thanks to the auto-reconfigurability of the proposed $V_{SW}-based$ dead-time controller in the gate driver, ZVS of all power FETs with minimal body diode conduction loss can be achieved in a wide input range (110V-250V) to guarantee the reliability of the proposed converter. Implemented in a 0.7μm 700V CMOS-LDMOS process, the proposed gate driver achieves ≤ 18ns propagation delays and enables a 250V 45W isolated three-level converter to achieve the peak power efficiencies of 94.2% and 89.1% at 1MHz and 2MHz, respectively. |
| Starting Page | 1479 |
| Ending Page | 1484 |
| File Size | 414173 |
| Page Count | 6 |
| File Format | |
| e-ISBN | 9781467371513 |
| DOI | 10.1109/ECCE.2015.7309868 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2015-09-20 |
| Publisher Place | Canada |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Field effect transistors Capacitors Windings Switches Zero voltage switching Logic gates IP networks |
| Content Type | Text |
| Resource Type | Article |
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