NDLI: An early design estimation approach to synthesize the low-power pre-computation-based content addressable memory

Content Provider	IEEE Xplore Digital Library
Author	Rueichi Shen Chinhung Peng Feipei Lai
Copyright Year	2011
Description	Author affiliation: Department of Computer Science and Information Engineering, National Taiwan University, Taipei, Taiwan (Chinhung Peng) \|\| Graduate Institute of Biomedical, Electronics and Bioinformatics, National Taiwan University, Taipei, Taiwan (Feipei Lai) \|\| Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan (Rueichi Shen)
Abstract	Content addressable memory (CAM) is often used in many applications which require searching in high speed such as network router, translation look-aside buffer (TLB), Huffman decoding, discrete cosine transform or the applications having quick lookup table operation. Due to its operational characteristic of parallel data searching, the power consumption is also exacerbated. In this paper, we propose a methodology for synthesizing a low power pre-computation-based content addressable memory (PB-CAM) effectively. The concept of discrete uniform distribution is adopted in pre-computation block so as to verify the outcomes of power reduction when the adaptive parameter extractors are synthesized in a different manner. With our proposed approach, we are able to estimate the tendency towards power consumption efficiently and determine which type of parameter extractor is superior in power reduction for the specific data. Experiment shows the power consumption of our approach is better by at least 29% compared with original parameter extractors.
Starting Page	21
Ending Page	25
File Size	421979
Page Count	5
File Format	PDF
ISBN	9781612849317
e-ISBN	9781612849317
DOI	10.1109/ICOS.2011.6079244
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-09-25
Publisher Place	Malaysia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Power demand Conferences Gate Block Selection Parameter extractor Data mining CAM PB-CAM Associative memory DAI(Discard and Interlace) Computer architecture Open systems Logic gates Block-XOR One's count
Content Type	Text
Resource Type	Article

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