NDLI: FLOVA: A four-issue VLIW geometry processor with SIMD instructions and lighting acceleration unit

Content Provider	IEEE Xplore Digital Library
Author	Sang-Joon Nam Byoung-Woon Kim Yeon-Ho Im Young-Su Kwon Jun-Hee Lee Young-Wook Cheon Sung-Jae Byun Dae-Hyun Lee Chong-Min Kyung
Copyright Year	2000
Description	Author affiliation: Korea Adv. Inst. of Sci. & Technol., South Korea (Sang-Joon Nam)
Abstract	This paper describes a VLIW (very long instruction word) geometry processor called FLOVA (FLOating-Point VLIW Architecture) which was developed to accelerate the geometry stage of 3D graphics. FLOVA executes four instructions in one cycle and supports 136 instructions including 35 SIMD (single instruction multiple data) instructions to accelerate the geometry stage. Special features to accelerate transformation and lighting operations in 3D graphics geometry stage are described. FLOVA can calculate the power value of two floating-point numbers in only four clock cycles with a negligible loss of accuracy, compared to over 150 clock cycles in other processors.
Starting Page	551
Ending Page	554
File Size	352580
Page Count	4
File Format	PDF
ISBN	0780358090
DOI	10.1109/CICC.2000.852728
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2000-05-24
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	VLIW Geometry Acceleration Clocks Multimedia computing Video compression Computer graphics Engines Speech processing Telephony
Content Type	Text
Resource Type	Article

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FLOVA: A four-issue VLIW geometry processor with SIMD instructions and lighting acceleration unit