NDLI: Multiprocessor design verification with generated realistic MP programs

Content Provider	IEEE Xplore Digital Library
Author	Sullivan, M. Wilson, P. Montemayor, C. Evers, R. Yen, J.-T.
Copyright Year	1995
Description	Author affiliation: Somerset Design Center, Austin, TX, USA (Sullivan, M.; Wilson, P.; Montemayor, C.; Evers, R.; Yen, J.-T.)
Abstract	High-end microprocessors now tend to be superscalar, to execute operations out of order, and to support shared memory among multiple processors. Verifying the functionality of such a microprocessor using simulation requires many stages, from tests of simple portions of the design, through simple tests of a single processor to complex tests of multiple processors. We followed this strategy using some already existing tools and writing some new tests and tools. We describe in this paper the general strategy and the tool set we created to perform the final simulation stage of design verification: running complex tests on a model of a multiprocessor system. This tool set operates on the principle that tests which mimic real programs are more likely to uncover errors that customers would encounter. Our results show that random realistic tests can get better coverage of common multiprocessor scenarios in fewer cycles than purely random tests.<>
Starting Page	389
Ending Page	395
File Size	609167
Page Count	7
File Format	PDF
ISBN	0780324927
DOI	10.1109/PCCC.1995.472463
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1995-03-28
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Power system modeling Microprocessors System testing Reduced instruction set computing Monitoring Out of order Computer bugs Automatic programming Postal services Writing
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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