NDLI: A Methodology for the Formal Verification of RISC Microprocessors A Functional Approach

Content Provider	IEEE Xplore Digital Library
Author	Merniz, S. Benmohammed, M.
Copyright Year	2007
Description	Author affiliation: Constantine Univ., Constantine (Merniz, S.; Benmohammed, M.)
Abstract	We propose a methodological approach for the formal specification and verification of RISC processor microarchitectures within a functional framework. The approach exploits only the next state function to formally specify both ISA and MA levels and proves their equivalence in a systematic way. Moreover, the proof could be performed at different architectural levels. The central idea consists of decomposing the next state function into coordinates such that to model the microarchitecture at the component level. Such decomposition allows the proof to be systematically decomposed into a set of verification conditions more simple to reason about and to verify. The potential features of the proof methodology are demonstrated over the MIPS processor within Haskell framework.
Starting Page	492
Ending Page	499
File Size	381657
Page Count	8
File Format	PDF
ISBN	1424410304
DOI	10.1109/AICCSA.2007.370927
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-05-13
Publisher Place	Jordan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Formal verification Reduced instruction set computing Microprocessors Instruction sets Microarchitecture Laboratories Computer science Functional programming Design methodology Process design RISC processors Functional design Verification
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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