NDLI: On optimal extraction of combinational logic and don't care sets from hardware description languages

Content Provider	IEEE Xplore Digital Library
Author	Colon-Bonet, G. Schwarz, E.M. Bostick, D.G. Hachtel, G.D. Lightner, M.R.
Copyright Year	1989
Description	Author affiliation: Dept. of Electr. & Comput. Eng., Colorado Univ., Boulder, CO, USA (Colon-Bonet, G.; Schwarz, E.M.; Bostick, D.G.; Hachtel, G.D.; Lightner, M.R.)
Abstract	The authors describe efficient polynomial algorithms for the extraction of topologically minimal multilevel Boolean equations and don't care conditions from the C-based hardware description language CHDL, which has control constructs switch, if-then-else, and go-to. They show that significant savings in CPU cost, area cost, and robustness may be obtained by applying these algorithms as a preprocessing step before using higher cost minimization tools such as BOLD or misII. The approach is based on a control-flow-graph construct with embedded set-use-graph information. The algorithms parse a CHDL description into a directed, nonseries parallel control flow graph. In cases where the graph is also acyclic, graph search and decomposition algorithms are used to derive a Boolean network representing the implied combinational logic. The derived equations are topologically irredundant in the sense that the topological identities are associated with the fork, and join nodes of the control flow graph are accounted for in the code generation. Without this feature, multilevel logic optimizers would have to flatten the control expressions down to primary inputs to discover these identities.<>
Starting Page	308
Ending Page	311
File Size	515303
Page Count	4
File Format	PDF
ISBN	0818619864
DOI	10.1109/ICCAD.1989.76959
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1989-11-05
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Logic Costs Equations Switches Flow graphs Polynomials Hardware design languages Robustness Minimization methods Boolean functions
Content Type	Text
Resource Type	Article

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