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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Granado, J.M. Vega, M.A. Perez, R. Sanchez, J.M. Gomez, J.A. |
| Copyright Year | 2006 |
| Description | Author affiliation: Extremadura Univ., Caceres (Granado, J.M.; Vega, M.A.; Perez, R.; Sanchez, J.M.; Gomez, J.A.) |
| Abstract | In this paper we show and analyse the different alternatives used to implement, until now, artificial neural networks in FPGAs. At the moment, this is a very active research field, and still, there is a long way to travel. In this work, we focus on important aspects like: the neuron's multiplier and activation function implementation, the storage and representation of the implicated data, the most habitual improvements and simplifications, the reconfigurable hardware systems used to implement artificial neural networks,... Ending this paper with the conclusions obtained from this analysis work. Among them, it is important to highlight that the use of FPGAs to implement ANN is not only feasible, but also presents a hopeful future. |
| Starting Page | 934 |
| Ending Page | 937 |
| File Size | 299185 |
| Page Count | 4 |
| File Format | |
| ISBN | 1424403944 |
| DOI | 10.1109/ICECS.2006.379943 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2006-12-10 |
| Publisher Place | France |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Field programmable gate arrays Artificial neural networks Neurons Signal resolution Neural networks Neural network hardware Parallel processing Data processing Parallel programming Silicon |
| Content Type | Text |
| Resource Type | Article |
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