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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Inoue, K. |
| Copyright Year | 2006 |
| Description | Author affiliation: Kyushu Univ., Kasuga (Inoue, K.) |
| Abstract | This paper proposes an efficient cache line management algorithm for a security-aware cache architecture (SCache). SCache attempts to detect the corruption of return address values at runtime. When a return address store is executed, the cache generates a replica of the return address. This copied data is treated as read only. Subsequently, when the corresponding return address load is performed, the cache verifies the return address value loaded from the memory stack by means of comparing it with the replica data. Unfortunately, since the replica data is also a candidate for cache line replacements, SCache does not work well for application programs that cause higher cache miss rates. To resolve this issue, a lock and unlock data management algorithm is proposed in order to improve the security of SCache. The experimental results show that a proposed SCache model can protect about 99% of return address loads from the threat of buffer overflow attacks, while it worsens the processor performance by only 1%, compared with a nonsecure conventional cache. |
| Starting Page | 1093 |
| Ending Page | 1096 |
| File Size | 595936 |
| Page Count | 4 |
| File Format | |
| ISBN | 1424403944 |
| DOI | 10.1109/ICECS.2006.379629 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2006-12-10 |
| Publisher Place | France |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Buffer overflow Data security Technology management Informatics Paper technology Runtime Protection Computer worms Counting circuits Microprocessors |
| Content Type | Text |
| Resource Type | Article |
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