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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Fons, F. Fons, M. Canto, E. |
| Copyright Year | 2006 |
| Description | Author affiliation: Univ. Rovira i Virgili, Tarragona (Fons, F.; Fons, M.; Canto, E.) |
| Abstract | Fuzzy logic has emerged as an efficient strategy to develop accurate nonlinear controllers. This work presents a novel design methodology of dual-input single-output fuzzy logic controllers in search of a cost-effective solution. For this, instead of synthesizing the classical three-stage fuzzification, rule inference and defuzzification units, a further stage is added inspired in modeling the resultant control surface: the whole nonlinear area is split in specific rectangular sectors and each of them is approximated by a second-order polynomial function. In this way, the hardware-software co-design of the fuzzy controller is reduced to a computer that for each input point (x,y) calculates its output z=f(x,y) according to the surface model of the particular sector that encloses this input point. The physical implementation of the fuzzy controller is based on a MCU-FPGA platform where the control surface is segmented, parameterized, stored through initialized SRAM memory and appended to the design bitstream as a simple and customizable data file. Moreover, the dynamically reconfigurable FPGA makes feasible to multiplex the silicon-based functionality at run-time while the sequential execution of the fuzzy algorithm is in progress. |
| Starting Page | 1228 |
| Ending Page | 1231 |
| File Size | 447165 |
| Page Count | 4 |
| File Format | |
| ISBN | 1424403944 |
| DOI | 10.1109/ICECS.2006.379683 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2006-12-10 |
| Publisher Place | France |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Fuzzy logic Fuzzy control Automatic control Inference algorithms Fuzzy sets Reconfigurable logic Design methodology Field programmable gate arrays Humans Mathematical model |
| Content Type | Text |
| Resource Type | Article |
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