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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Hoe Jian Chong Dimatira, J. |
| Copyright Year | 2014 |
| Description | Author affiliation: SCG Ind. (M) Sdn. Bhd., ON Semicond., Seremban, Malaysia (Hoe Jian Chong; Dimatira, J.) |
| Abstract | Current technology trend demands not only for high efficiency but also for portable devices, devices which can be carried and access anywhere and everywhere. This continues drives semiconductor's package towards miniaturization. One way is by placing active circuitry underneath the bond pads, this will reduce the die size, hence achieve lower cost per chip. This technology has led to the development of a more robust top metal that can withstand the high ultrasonic energy being applied in the bond pad. The use of thick copper power metallization in package design had shown significant benefits over the conventional aluminum top metal. Copper power metallization is a stack layer of thick copper (10um), nickel (2.0um) and gold (0.5um) plated over the top passivation layer. These prominently improve the overall device electrical performance with higher efficiency and lower Rds(on) by offering metallization with lower resistance and enables die size reduction of 10~25% and provides flexibility which allows assembly of thicker bonding wires for high power applications. In copper power metallization, it helps in bondability and improves structural robustness especially with copper wire for underlying circuitry during the process. This paper presents the unique structure of this pad metallization, the challenges from die design phase and also looked at potential issues concerning passivation cracks and pad corrosions. This paper will also tackle how a stack layer of CuNiAu mitigates issues which are commonly encountered with Cu-Al bonding system (aluminum splash out issue, pad cratering and galvanic corrosion). The overall component interface integrity for this new metallization is unknown to us. Detail simulations were carried out to understand the system stress generated between the copper power pad and silicon (Si) die which affect the passivation integrity as well. Detail characterizations will be discussed to understand the ratcheting mechanism and its resolution. Assessment on package integrity with Moisture Level Sensitive (MSL1) condition was done to ensure it is well integrated with currently assembly process and material used with no delamination found. |
| Starting Page | 1 |
| Ending Page | 6 |
| File Size | 1332348 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781479982097 |
| DOI | 10.1109/IEMT.2014.7123109 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2014-11-11 |
| Publisher Place | Malaysia |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Copper Passivation Metallization Assembly Wires Bonding |
| Content Type | Text |
| Resource Type | Article |
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