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Content Provider | IEEE Xplore Digital Library |
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Author | Kuramochi, S. Koiwa, S. Suzuki, K. Fukuoka, Y. |
Copyright Year | 2014 |
Description | Author affiliation: Dai Nippon Printing Co., Ltd., Kashiwa, Japan (Kuramochi, S.; Koiwa, S.; Suzuki, K.) |
Abstract | As electronic product becomes smaller and lighter with an increasing number of function← the demand for high density and high integration becomes stronger.! Interposers for system in package will became more and more important for advanced electronic systems. Silicon interposers with through silicon vias (TSV) and back end of line (BEOL) wirring offer compelling benefits for 2.5D and 3D system integration;! however, they are limited by high cost and high electrical loss. On the other hand, glass has many properties that make it an ideal substrate for interposer substrates such as; ultra high resistivity, adjustable thermal expansion (CTE) and manufacturability with large panel size. Furthermore, glass via formation capabilities have dramatically improved over the past several months. Fully populated wafers with > 100,000 through holes (50μm diameter) are fabricated today with 300pm thick glass. This paper presents the demonstration of glass interposers with fine pitch through glass vias(TGV), ! with 6um RDL lithography. TGVs of 50μm in diameter and 200μm in pitch were formed successfully on 300μm thick alkali-free glass by Focused Electrical Discharging Method (FEDM). The TGVs were filled with solid Copper (Cu) using a void-free electroplating of optimized periodic pulse reverse(PPR) process and chemical mechanical polishing (CMP) as well as the TSVs. Highly insulating TGV with double side polymer insulation resulted in TGV with an insertion loss of less than 0.23dB at 20GHz. Excellent through via reliability was demonstrated, due to double side thick polymer insulator that buffers the stress created by CTE mismatch between glass, copper vias and copper traces, and TGV at 200μm pitch passed 1000 thermal cycles from -40Cdeg to 85Cdeg. |
Starting Page | 1673 |
Ending Page | 1678 |
File Size | 2278811 |
Page Count | 6 |
File Format | |
ISBN | 9781479924073 |
DOI | 10.1109/ECTC.2014.6897521 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 2014-05-27 |
Publisher Place | USA |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | Glass Silicon Copper Substrates Resistance Arrays Polymers |
Content Type | Text |
Resource Type | Article |
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