NDLI: Cell technology directions for advanced MPUs and other memory-embedded logic devices

Please wait, while we are loading the content...

2015 IEEE International Electron Devices Meeting (IEDM)

2013 IEEE International Electron Devices Meeting

2012 International Electron Devices Meeting

2011 International Electron Devices Meeting

2010 International Electron Devices Meeting

2009 IEEE International Electron Devices Meeting (IEDM)

2008 IEEE International Electron Devices Meeting

2007 IEEE International Electron Devices Meeting

2006 International Electron Devices Meeting

IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest.

IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004.

IEEE International Electron Devices Meeting 2003

Digest. International Electron Devices Meeting,

International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224)

International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138)

International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318)

International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217)

International Electron Devices Meeting. IEDM Technical Digest

International Electron Devices Meeting. Technical Digest

Proceedings of International Electron Devices Meeting

Proceedings of 1994 IEEE International Electron Devices Meeting

Proceedings of IEEE International Electron Devices Meeting

High-performance microwave power AlInAs/GaInAs/InP double heterojunction bipolar transistors with compositionally graded base-collector junction

A f/sub T/=175 GHz carbon-doped base InP/InGaAs HBT

High f/sub max/ InAlAs/InGaAs heterojunction bipolar transistors

An effective secondary electron emission suppression treatment for copper MDC electrodes

A model of secondary emission for use in computer simulation of vacuum electronic devices

Microminiature thermionic vacuum tube diodes

Electrical and thermal modeling of a gated field emission triode

Observation of emission from silicon field-emission arrays with focusing

Deflection microwave amplifier with field emission arrays

Field emission arrays for microwave applications

Progress in field-emitter array development for high-frequency operation

A new study of the junction leakage current due to 45/spl deg/-off active pattern after LOCOS process

Improvement of breakdown voltage and off-state leakage in Ge-implanted SOI n-MOSFETs

ULSI-quality gate oxide on thin-film-silicon-on-insulator

Latch-up performance of a sub-0.5 micron inter-well deep trench technology

Symmetric CMOS in fully-depleted silicon-on-insulator using P/sup +/-polycrystalline SiGe gate electrodes

Optimization of series resistance in sub-0.2 /spl mu/m SOI MOSFETs

A physical model including velocity overshoot for drain current of sub-0.15 /spl mu/m MOSFET's

Oxide-charge generation during hot-carrier degradation of PMOSTs

Impact of drain profiles on Ti-salicided pMOSFET characteristics analyzed by a first comprehensive coupled process/device simulator for salicided MOSFETs

Three-dimensional "atomistic" simulation of discrete random dopant distribution effects in sub-0.1 /spl mu/m MOSFET's

ULSI technology development by predictive simulations

High voltage, temperature-hard 3C-SiC Schottky diodes using all-Ni metallization

Low contact resistivity ohmic contacts to 6H-silicon carbide

200/spl deg/C high-temperature and high-speed operation of 440 V lateral IGBTs on 1.5 /spl mu/m thick SOI

High temperature performance of dielectrically isolated LDMOSFET, LIGBT and LEST

A 4500 V injection enhanced insulated gate bipolar transistor (IEGT) operating in a mode similar to a thyristor

The trench MOS barrier Schottky (TMBS) rectifier

Single event gate rupture of power DMOS transistors

A novel global planarization technology using defocused resist patterning with blanket stripe mask (DRESS)

Damage-free metal etching using Lissajous electron plasma

Resolution enhancement by oblique illumination optical lithography using a pupil filter

Practical attenuated phase-shifting mask with a single-layer absorptive shifter of MoSiO and MoSiON for ULSI fabrication

Microelectronics manufacturing science and technology (MMST): single-wafer RTP-based 0.35 /spl mu/m CMOS IC fabrication

NAND-structured cell technologies for low cost 256 Mb DRAMs

Wafer burn-in (WBI) technology for RAM's

Impedance, modulation response, and equivalent circuit of ultra-high-speed InGaAs/GaAs MQW lasers

Low-threshold AlGaAs/GaAs vertical-cavity surface-emitting laser on Si substrate at 300 K

980 nm zone lasers [InGaAs quantum wells]

Self-referenced poly-Si TFT amplifier readout for a linear image sensor

A 128/spl times/128 CMOS active pixel image sensor for highly integrated imaging systems

A multiple output CMD imager for real-time image processing

A 1/4 inch format 250 K pixel amplified MOS image sensor using CMOS process

A random noise reduction cell for the photoconversion layer overlaid CCD image sensors

Groove-fill of tungsten and poly-Si membrane technology for high performance (HDTV) FT-CCD imagers

Multilevel planarized-trench-aluminum (PTA) interconnection using reflow sputtering and chemical mechanical polishing

Highly linear capacitive pressure sensors with optimized electrode shapes

CMOS micromechanical resonator oscillator

Influence of air pressure on resonating and thermoelectric microstructures realized with standard IC technologies

Silicon micromachined thermal profilers

Present status and future prospects for liquid crystal display technology

High-frequency modulation of a QW diode laser by dual modal gain and pumping current control

High-density active matrix electroluminescent display using single-crystal silicon-on-insulator high-voltage IC technology

Device characteristics of 0.1 /spl mu/m MOSFET with RONO (reoxidized nitrided oxide) gate dielectrics

An 8/spl times/8 array of surface emitting lasers with heterojunction bipolar transistors integrated on them

High transconductance n- and p-channel GaAs MESFETs using novel amphipolar Cu/sub 3/Ge ohmic contacts

Ultra-high breakdown high-performance AlInAs/GaInAs/InP power HEMTs

Tunable internal photoemission sensor using silicide/silicon heterostructures

A 0.1 /spl mu/m CMOS with a step channel profile formed by ultra high vacuum CVD and in-situ doped ions

21 psec switching 0.1 /spl mu/m-CMOS at room temperature using high performance Co salicide process

Electrothermal simulation of electrical overstress in advanced nMOS ESD I/O protection devices

Scaling limitations of gate oxide in p/sup +/ polysilicon gate MOS structures for sub-quarter micron CMOS devices

Submicron CMOS gate electrode discontinuity: electrical signature and effect on circuit speed

Ultranarrow trench-isolated 0.2-/spl mu/m CMOS and its application to ultralow-power frequency dividers

0.15 /spl mu/m CMOS with high reliability and performance

Oxide thickness dependence of inverter delay and device reliability for 0.25 /spl mu/m CMOS technology

Estimation of wafer cost for technology design

Accelerated Monte Carlo modeling of an RTCVD-reactor

A statistical polishing pad model for chemical-mechanical polishing

3D modeling of contact material deposition and its impact on equipment design parameters

A simulation of micro-loading phenomena in dry-etching process using a new adsorption model

Profile simulation of plasma enhanced and ECR oxide deposition with sputtering

One-decade reduction of pn-junction leakage current using poly-Si interlayered SOI structures

The impact of fluorine on CMOS channel length and shallow junction formation

Novel elevated silicide source/drain (ESSOD) by load-lock LPCVD-Si and advanced silicidation processing

Impact of arsenic deactivation in polycrystalline silicon and at polysilicon-monosilicon interfaces on contact resistance

New dual gate doping process using in-situ boron doped-Si for deep sub-/spl mu/m CMOS device

A new toroidal TFT structure for future generation SRAMs

Soft error rate and stored charge requirements in advanced high-density SRAMs

Center wordline cell: A new symmetric layout cell for 64 Mb SRAM

SOI for a 1-volt CMOS technology and application to a 512 Kb SRAM with 3.5 ns access time

A stacked split word-line (SSW) cell for low-voltage operation, large capacity, high speed SRAMs

Reduction of 1/f noise current with non-equilibrium electron transport in AlInAs/InGaAs heterojunction bipolar transistors

Ballistic transport effects in InP/GaInAs heterostructure bipolar transistors

Novel HBT structure for high f/sub t/ at low current density

A capacitorless DRAM cell on SOI substrate

A newly designed planar stacked capacitor cell with high dielectric constant film for 256 Mbit DRAM

A 0.6 /spl mu/m/sup 2/ 256 Mb trench DRAM cell with self-aligned BuriEd STrap (BEST)

An excellent weight-updating-linearity synapse memory cell for self-learning neuron MOS neural networks

1.3 /spl mu/m strained-layer MQW-DFB laser with low noise and low distortion characteristics for 100-channel CATV transmission

The effect of carrier capture on the modulation bandwidth of quantum well lasers

High characteristic temperature 1.48 /spl mu/m strained-layer MQW laser diode with wide bandgap barrier layers

A 1/4 inch 380 k pixel IT-CCD image sensor employing gate-assisted punchthrough read-out mode

Modeling on increase of n-p-n and p-n-p current gain by hydrogen electromigration in polysilicon emitters

Metal (CoSi/sub 2/)/insulator(CaFa/sub 2/) resonant tunneling transistor

Negative resistance VLSI integrable devices

Evidence of real-space hot-electron transfer in high mobility, strained-Si multilayer MOSFETs

A room-temperature single-electron memory device using fine-grain polycrystalline silicon

A sub-0.1-/spl mu/m grooved gate MOSFET with high immunity to short-channel effects

Water-related threshold voltage instability of polysilicon TFTs

Evaluation of moisture induced hot-carrier degradation of N- and P-MOSFETs using steam stress

PMOS hot-carrier rebound and degradation

Two-stage hot-carrier degradation and its impact on submicron LDD NMOSFET lifetime prediction

Projecting CMOS circuit hot-carrier reliability from DC device lifetime

A flux-based approach to HBT device modeling

Characterizing subthreshold behavior in poly-Si TFTs based on interface trap states

A physical poly-silicon thin film transistor model for circuit simulations

Description of the bias dependent overlap capacitance at LDD MOSFETs for circuit applications

A novel method to determine gate-drain overlap in sub-micron transistors

Compact MOS modeling for analog circuit simulation

Sensitivity of field isolation profiles to active pattern

CAD-compatible high-speed CMOS/SIMOX technology using field-shield isolation for 1 M gate array

Improving gate oxide integrity in p/sup +/pMOSFET by using large grain size polysilicon gate

Impact of plasma charging damage and diode protection on scaled thin oxide

Lightly N/sub 2/O nitrided dielectrics grown in a conventional furnace for E/sup 2/PROM and 0.25 /spl mu/m CMOS

A boron-retarding and high interface quality thin gate dielectric for deep-submicron devices

Poly-ridge emitter transistor (FRET): simple low-power option to a bipolar process

TFSOI BiCMOS technology for low power applications

A 0.5 /spl mu/m CMOS technology for multifunctional applications with embedded FN-flash memory and linear R and C modules

A novel borderless contact/interconnect technology using aluminum oxide etch stop for high performance SRAM and logic

High-performance CMOS with oxidation-planarized twin tubs and one-mask sealed diffusion-junctions

Tenth micron p-MOSFET's with ultra-thin epitaxial channel layer grown by ultra-high-vacuum CVD

Fabrication of quantum dots using in-situ etching and regrowth during MBE growth

Microwave studies of self-aligned top-collector charge injection transistors

Co-integrated resonant tunneling and heterojunction bipolar transistor full adder

Flexible and reduced-complexity logic circuits implemented with resonant tunneling transistors

Electron wave switch with distributed coherent resonant tunneling coupling

Submicron Schottky-collector AlAs/GaAs resonant tunnel diodes

A high aperture and high density a-Si TFT-LCD with a new pixel structure

Oxygen plasma enhanced crystallization of a-Si for low thermal budget poly-Si TFTs on Corning 7059 glass

A novel floating gate spacer polysilicon TFT

An LCD addressed by a-Si:H TFTs with peripheral poly-Si TFT circuits

Analysis of leakage currents in poly-silicon thin film transistors

Current status of the digital micromirror device (DMD) for projection television applications

Design and the first experiment of a 1 THz gyrotron

Experimental studies of a 30 MW two-cavity second harmonic gyroklystron

Experiments of 10th cyclotron harmonic peniotron oscillator

Harmonic high power 95 GHz peniotron

Initial operation of a wideband gyro-TWT amplifier

Initial tests of a high power, broadband, harmonic gyroTWT

Broadband operation of a two-stage tapered gyro-TWT amplifier

Design and construction of a 95 GHz, 4/sup th/ harmonic oscillator experiment

Impact ionization phenomenon in 0.1 /spl mu/m MOSFET at low temperature and low voltage

Substrate hole current generation and oxide breakdown in Si MOSFETs under Fowler-Nordheim electron tunneling injection

Measurement of the hot hole injection probability from Si into SiO/sub 2/ in p-MOSFETs

Suppression of boron penetration into an ultra-thin gate oxide (/spl les/7 nm) by using a stacked-amorphous-silicon (SAS) film

Novel NICE (nitrogen implantation into CMOS gate electrode and source-drain) structure for high reliability and high performance 0.25 /spl mu/m dual gate CMOS

Thin CVD stacked gate dielectric for ULSI technology

A simulation of plastic deformation of silicon during thermal oxidation

Explanation of reverse short channel effect by defect gradients

MOSFET reverse short channel effect due to silicon interstitial capture in gate oxide

The effects of strain on dopant diffusion in silicon

A high-resolution study of two-dimensional oxidation-enhanced diffusion in silicon

Species, dose and energy dependence of implant induced transient enhanced diffusion

An accurate and computationally-efficient model of boron implantation through screen oxide layers into (100) single-crystal silicon

A highly reliable via filling technology using high-temperature Al-Sc alloy sputter deposition

Interconnection formation by simultaneous copper doping in chemical-vapor-deposited aluminum (Al-Cu CVD)

A dual damascene hard metal capped Cu and Al-alloy for interconnect wiring of ULSI circuits

Evaluation of electromigration and stressmigration reliabilities of copper interconnects by a simple pulsed-current stressing technique

Reliability of CVD Cu buried interconnections

High performance dielectrics and processes for ULSI interconnection technologies

A monolithic 23.5 to 94 GHz frequency quadrupler using 0.1 /spl mu/m pseudomorphic AlGaAs/InGaAs/GaAs HEMT technology

Embedded ground planes using sidewall insulators for high frequency interconnections in integrated circuits

Polysilicon resistor trimming for packaged integrated circuits

Enhanced performance of multi-GHz PLL LSIs using sub-1/4-micron gate ultrathin film CMOS/SIMOX technology with synchrotron X-ray lithography

Low noise and high gain 94 GHz monolithic InP-based HEMT amplifiers

GaAs integrated circuits for consumer applications

High-performance InP-based HEMT's with a graded pseudomorphic channel

Comparison of 80 nm-200 nm gate length Al/sub 0.25/GaAs/GaAs/Al/sub 0.25/GaAs, Al/sub 0.3/GaAs/In/sub 0.15/GaAs/GaAs and In/sub 0.52/AlAs/In/sub 0.65/GaAs/InP HEMTs

An improved structure of a-SiC:H thin film p-i-n junction LED

Long wavelength In/sub 0.53/Ga/sub 0.47/As photodetectors on GaAs with a thin super lattice buffer

High-speed InP/InGaAs heterojunction phototransistors with emitter metal reflector

Polarization and phase sensitive normal incidence multiple quantum well light modulator with 7000:1 contrast

In-situ acoustic thermometry and tomography for rapid thermal processing

High fill factor and progressive scan PtSi Schottky-barrier IR-CCD image sensor having new wiring structure over photodiodes

Monolithic CCD time-delay-and-integrate arrays in HgCdTe

High-performance infrared thermal imaging with monolithic silicon focal planes operating at room temperature

A 50-MeV mm-wave electron linear accelerator system for production of tunable short wavelength synchrotron radiation

NRL ubitron amplifier performance

TE/sub 01/ windows for high power klystron applications

Transmission line modelling of helix slow wave structures

A new quadrupole PPM focusing scheme for high density electron beams

An integral-polepiece folded-waveguide slow-wave circuit for high-power millimeter-wave TWTs

Microwave power module (MPM) development and results

RF system considerations for accelerator production of tritium and the transmutation of nuclear waste

Gate recessed (GR) MOSFET with selectively halo-doped channel and deep graded source/drain for deep submicron CMOS

Room temperature 0.1 /spl mu/m CMOS technology with 11.8 ps gate delay

High performance 0.1 /spl mu/m CMOS devices with 1.5 V power supply

Threshold voltage controlled 0.1-/spl mu/m MOSFET utilizing inversion layer as extreme shallow source/drain

Sub-50 nm gate length n-MOSFETs with 10 nm phosphorus source and drain junctions

Ultimate CMOS ULSI performance

Wigner-Poisson simulation of memory switching heterostructure tunneling diodes

An efficient simulation method for linking bipolar process and device optimization to circuit performance

A new, efficient approach to the large-scale thermal modeling of III-V devices and integrated circuits

Evaluation of self-heating effect in poly-Si TFT using quasi three-dimensional temperature analysis

TCAD in power device design and optimization

A comprehensive study of lateral and vertical current transport in Si/Si/sub 1-x/Ge/sub xSi HBT's

Vertical profile optimization of very high frequency epitaxial Si- and SiGe-base bipolar transistors

High speed SiGe-HBT with very low base sheet resistivity

An ultra low power lateral bipolar polysilicon emitter technology on SOI

Optimization of SiGe HBT technology for high speed analog and mixed-signal applications

15-ps ECL/74-GHz f/sub T/ Si bipolar technology

An NPN 30 GHz, PNP 32 GHz f/sub T/ complementary bipolar technology

A highly manufacturable trench isolation process for deep submicron DRAMs

Degradation-free Ta/sub 2/O/sub 5/ capacitor after BPSG reflow at 850/spl deg/C for high density DRAMs

Ultra-thin TiN/Ta/sub 2/O/sub 5W capacitor technology for 1 Gbit DRAM

ULSI DRAM/SIMOX with stacked capacitor cells for low-voltage operation

Performance and reliability improvement in poly-Si TFTs by fluorine implantation

Cell technology directions for advanced MPUs and other memory-embedded logic devices

A highly reliable metal-to-metal antifuse for high-speed field programmable gate arrays

Conducting filament of the programmed metal electrode amorphous silicon antifuse

Degradation mechanism of flash EEPROM programming after program/erase cycles

A high capacitive-coupling ratio (HiCR) cell for 3 V-only 64 Mbit and future flash memories

NOR virtual ground (NVG)-a new scaling concept for very high density flash EEPROM and its implementation in a 0.5 um process

Performance of the 3-D sidewall flash EPROM cell

Nanoelectronic devices: opportunities and challenges

Electronics technology for low-power computing and wireless communication

Proceedings of IEEE International Electron Devices Meeting

A 213 GHz AlInAs/GaInAs/InP HEMT MMIC oscillator

Investigation of hot electron luminescence in silicon by means of dual-gate MOSFET's

1992 International Technical Digest on Electron Devices Meeting

International Electron Devices Meeting 1991 [Technical Digest]

International Technical Digest on Electron Devices

International Technical Digest on Electron Devices Meeting

Technical Digest., International Electron Devices Meeting

1987 International Electron Devices Meeting

1986 International Electron Devices Meeting

1985 International Electron Devices Meeting

1984 International Electron Devices Meeting

1983 International Electron Devices Meeting

1982 International Electron Devices Meeting

1981 International Electron Devices Meeting

1980 International Electron Devices Meeting

1979 International Electron Devices Meeting

1978 International Electron Devices Meeting

1977 International Electron Devices Meeting

1976 International Electron Devices Meeting

1975 International Electron Devices Meeting

1974 International Electron Devices Meeting (IEDM)

1973 International Electron Devices Meeting

1972 International Electron Devices Meeting

1971 International Electron Devices Meeting

1970 International Electron Devices Meeting

1969 International Electron Devices Meeting

1968 International Electron Devices Meeting

1967 International Electron Devices Meeting

1966 International Electron Devices Meeting

1965 International Electron Devices Meeting

1964 International Electron Devices Meeting

1963 International Electron Devices Meeting

1962 International Electron Devices Meeting

1961 International Electron Devices Meeting

1960 International Electron Devices Meeting

1959 International Electron Devices Meeting

1957 International Electron Devices Meeting

1956 International Electron Devices Meeting

1955 International Electron Devices Meeting

Cell technology directions for advanced MPUs and other memory-embedded logic devices

Content Provider	IEEE Xplore Digital Library
Author	Kinugawa, M. Kakumu, M.
Copyright Year	1993
Description	Author affiliation: Semicond. Device Eng. Lab., Toshiba Corp., Kawasaki, Japan (Kinugawa, M.; Kakumu, M.)
Abstract	In this paper, a guideline for optimum embedded memory structures for advanced MPUs and other memory-embedded logic devices is proposed. It is concluded that introduction of full CMOS cells is inevitable for future SRAMs operated under reduced power supply voltage conditions. Therefore, MPUs will continue to use full CMOS cells maintaining excellent process and transistor design compatibility with SRAMs. On the other hand, some advanced logic devices will use DRAM cells, since they require higher density rather than higher performance or better process compatibility.<>
Starting Page	37
Ending Page	40
File Size	311109
Page Count	4
File Format	PDF
ISBN	0780314506
ISSN	01631918
DOI	10.1109/IEDM.1993.347404
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1993-12-05
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Logic devices Threshold voltage Process design Random access memory Power supplies Guidelines Driver circuits Thin film transistors Virtual manufacturing Semiconductor devices
Content Type	Text
Resource Type	Article
Subject	Materials Chemistry Electronic, Optical and Magnetic Materials Condensed Matter Physics Electrical and Electronic Engineering

Central Library (ISO-9001:2015 Certified)
Indian Institute of Technology Kharagpur
Kharagpur, West Bengal, India | PIN - 721302

See location in the Map
03222 282435
Mail: support@ndl.gov.in

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in