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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Petry, J. Singanamalla, R. Xiong, K. Ravit, C. Simoen, E. O'Connor, R. Veloso, A. Adelmann, C. Van Elshocht, S. Paraschiv, V. Brus, S. Van Berkum, J. Kubicek, S. De Meyer, K. Biesemans, S. Hooker, J.C. |
| Copyright Year | 2007 |
| Description | Author affiliation: NXP, Leuven (Petry, J.; Xiong, K.; Ravit, C.; Hooker, J.C.) |
| Abstract | Abstract MoON has been reported to be a good PMOS candidate. In this paper, we report tuning of the MoON PMOS metal towards Si conduction band-edge with $V_{tau}$ as low as 0.35V for SiON capped with DyO, using a standard high temperature gate first process flow. Consistent shifts of 450 mV in $V_{FB}$ and $V_{tau}$ are observed by capping SiON with DyO for MoON gate. Gate leakage as low as $10^{-7}$ $A/cm^{2}$ at 17.6A EOT is obtained, outperforming HfSiON by 3 orders of magnitude. Intermixing of SiON and DyO is shown to be the key element leading to low EOT and low gate leakage without any degradation of the gate oxide integrity. |
| Starting Page | 329 |
| Ending Page | 332 |
| File Size | 3780408 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781424415076 |
| DOI | 10.1109/IEDM.2007.4418938 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2007-12-10 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | MOS devices Moon Dielectrics Atherosclerosis Electrodes Gate leakage Hafnium Atomic layer deposition Tin Annealing |
| Content Type | Text |
| Resource Type | Article |
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