NDLI: Bit-rate reduction of MPEG compressed video

Content Provider	IEEE Xplore Digital Library
Author	Fatemi, O. Ghandi, M.M. Modirzadeh, M.E. Ghandi, M.
Copyright Year	2002
Description	Author affiliation: Dept. of Electr. & Comput. Eng., Univ. of Tehran, Iran (Fatemi, O.; Ghandi, M.M.; Modirzadeh, M.E.)
Abstract	Compressed video processing is becoming increasingly important in many digital video applications. There are two main approaches for compressed video processing. The first approach is called re-encoding and the second is called compressed domain processing (CDP). Bit-rate reduction is a very common process in video processing applications. In our research, the bit-rate reduction process is implemented using an SNR-scaling scheme. We have implemented enhanced compressed domain processor software in order to reduce the MPEG video bit-rate in the compressed domain. The software includes two additional algorithms to achieve better quality. The first is to remove the propagated requantization noise by calculating the noise with DCT domain motion compensation (MC-DCT) method. And the second is an optimized rate-control to improve the quality. Simulation results show that our proposed CDP algorithms outperform re-encode algorithm in terms of speed and quality.
Sponsorship	Dept. Electr. & Comput. Eng. Faculty of Graduate Studies Faculty of Eng. TRLabs Internet Innovation Centre NRC Inst. Biodiagnostics APEGM IEEE Winnipeg Sec. IEEE Canada & IEEE Manitoba Hydro Vansco Electron. Bristol Aerosp. Nygard Int. Norsat
Starting Page	1049
Ending Page	1054
File Size	432460
Page Count	6
File Format	PDF
ISBN	0780375149
ISSN	08407789
DOI	10.1109/CCECE.2002.1013090
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2002-05-12
Publisher Place	Canada
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Transform coding Video compression Signal processing algorithms Application software Videoconference Bit rate Decoding Software algorithms Quantization Discrete cosine transforms
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Hardware and Architecture

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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