NDLI: Library compatible C/sub eff/ for gate-level timing

Content Provider	IEEE Xplore Digital Library
Author	Sheehan, B.N.
Copyright Year	2002
Description	Author affiliation: Mentor Graphics Corp., Wilsonville, OR, USA (Sheehan, B.N.)
Abstract	Accurate gate-level static timing analysis in the presence of RC loads has become an important problem for modern deep-submicron designs. Non-capacitive loads are usually analyzed using the concept of an effective capacitance, C/sub eff/. Most published algorithms for C/sub eff/, however, require special cell characterization or supplemental information that is not part of standard timing libraries. In this paper we present a novel C/sub eff/ algorithm that is strictly compatible with existing timing libraries. It is also fast, easily implemented, and quite accurate-within 3% of transistor-level simulation in our tests. The method is based on approximating a gate by a current source, estimating the delay difference when the gate drives the actual RC load and a reference capacitor, and then converting the delay discrepancy into a C/sub eff/ value. Central to carrying out this program is the innovative concept of delay correction transfer function.
Sponsorship	EDAA
Starting Page	826
Ending Page	830
File Size	283201
Page Count	5
File Format	PDF
ISBN	0769514715
ISSN	15301591
DOI	10.1109/DATE.2002.998394
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2002-03-04
Publisher Place	France
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Libraries Timing Capacitance Delay estimation Delay effects Iterative algorithms Graphics Standards publication Testing Drives
Content Type	Text
Resource Type	Article

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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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