NDLI: Edisim and Edicap: Graphical Simulator Interfaces

Content Provider	IEEE Xplore Digital Library
Author	Hill, D.D.
Copyright Year	1983
Description	Author affiliation: Bell Laboratories, Murray Hill, NJ (Hill, D.D.)
Abstract	Edisim and Edicap are new CAD tools that greatly simplify the use of simulation in LSI design. Unlike previous simulator systems which require the user to type in commands textually, the edisim/edicap user works directly from the chip layout displayed on a color monitor. Input nodes are identified merely by pointing to them. This eliminates the problem of referring to internal nodes by names which are often artificial and arbitrary (e.g. "cl0.mp2"). Likewise, simulation results are also displayed on the color screen. Edisim works at the logic level, and makes use of the switch-level simulator "isim" [Szym81]. Edicap works at the analogue voltage level, and is based on the timing simulator "emu" [Ackl81]. In edisim results are displayed by modulating the layout according to logic state: logic one is displayed in bright colors, logic zero as dark rectangles, and the X state as a rectangle with an "x" through it. Edicap can display results in a similar way, except that the X state corresponds to a voltage somewhere between the logic 0 and logic one threshold, rather than an unknown quantity. Edicap can also produce waveform plots of selected nodes merely by pointing to them on the color screen. Compared with the textual interface provided by most simulators, the graphic interface of edisim and edicap is simpler to learn and faster to use for both the novice and the experienced designer.
Starting Page	608
Ending Page	614
File Size	749752
Page Count	7
File Format	PDF
ISBN	0818600268
ISSN	0738100X
DOI	10.1109/DAC.1983.1585717
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1983-06-27
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Logic Circuit simulation Graphics Layout Design automation Large scale integration Monitoring Voltage Timing Displays
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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