NDLI: AQUARIUS: Logic Simulation on an Engineering Workstation

Content Provider	IEEE Xplore Digital Library
Author	Sangster, A. Monahan, J.
Copyright Year	1983
Description	Author affiliation: Xerox Corporation (Sangster, A.)
Abstract	Aquarius is an interactive hierarchical logic simulator designed to run in a multiple window (concurrent processing) environment on an Engineering Workstation. This approach lets an engineer iterate conveniently between simulation and modification of the logic model or input patterns. Because Aquarius is hierarchical, any subtree of the model may be simulated, facilitating bottom-up design verification. Aquarius uses an event-driven selective trace algorithm and 9 logic states. It models the bidirectional nature of NMOS and CMOS pass elements with a variation of the Sherwood algorithm, which uses pairs of unidirectional gates and inserts phantom zero-delay elements at junction points. This modified algorithm precludes the possibility of erroneous feedback that can result from application of the Sherwood approach for certain network topologies. The Aquarius interactive user interface is menu driven; its progressive disclosure approach uses a form fill-in paradigm and postfix syntax that is keystroke efficient and natural for engineers.
Starting Page	93
Ending Page	99
File Size	606707
Page Count	7
File Format	PDF
ISBN	0818600268
ISSN	0738100X
DOI	10.1109/DAC.1983.1585632
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1983-06-27
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Workstations Semiconductor device modeling CMOS logic circuits Logic design Design engineering MOS devices Imaging phantoms Feedback Network topology User interfaces engineering workstation interactive simulation logic simulation MOS simulation computer-aided engineering
Content Type	Text
Resource Type	Article

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