NDLI: Improved on-chip router analytical power and area modeling

Content Provider	IEEE Xplore Digital Library
Author	Kahng, A.B. Lin, B. Samadi, K.
Copyright Year	2010
Description	Author affiliation: ECE Departments, UC San Diego, La Jolla, CA, USA (Lin, B.; Samadi, K.) \|\| CSE, UC San Diego, La Jolla, CA, USA (Kahng, A.B.)
Abstract	Over the course of this decade, uniprocessor chips have given way to multi-core chips which have become the primary building blocks of today's computer systems. The presence of multiple cores on a chip shifts the focus from computation to communication as a key bottleneck to achieving performance improvements. As industry moves towards many-core chips, networks-on-chip (NoCs) are emerging as the scalable fabric for interconnecting the cores. With power now the first-order design constraint, early-stage estimation of NoC power has become crucially important. Existing power models (e.g., ORION 2.0 [12], Xpipes [7], etc.) are based on certain router microarchitecture and circuit implementation. Therefore, when validated against different NoC prototypes - different router implementations - we saw significant deviation (up to 40% on average) that can lead to erroneous NoC design choices. This has prompted our development of a new, accurate architecture- and circuit implementation-independent router power and area modeling methodology with complete portability across existing NoC component libraries. Also, validation against a range of implemented router designs confirms substantial improvement in accuracy over existing models.
Starting Page	241
Ending Page	246
File Size	181047
Page Count	6
File Format	PDF
ISBN	9781424457656
DOI	10.1109/ASPDAC.2010.5419887
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-01-18
Publisher Place	Taiwan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Network-on-a-chip Microarchitecture Power system modeling Circuit simulation Libraries Parallel processing Workstations Microprocessors System-on-a-chip Power measurement
Content Type	Text
Resource Type	Article

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