NDLI: A generalized technique for energy-efficient operating voltage set-up in dynamic voltage scaled processors

Content Provider	IEEE Xplore Digital Library
Author	Jaewon Seo Dutt, N.D.
Copyright Year	2005
Description	Author affiliation: KAIST, Daejeon, South Korea (Jaewon Seo)
Abstract	Dynamic voltage scaling (DVS) which is an effective energy minimization technique has been well-studied in recent years. Yet the problem of selecting voltage levels for multiple voltage DVS systems remains an unresolved issue. In this paper, we present a novel technique for dealing with the problem of finding k operating voltages to minimize the energy consumption (voltage set-up problem). A new formulation of the voltage set-up problem is given to make our solution less dependent on the specific DVS scheme. Then it is solved optimally using dynamic programming in polynomial time. With almost the same time complexity we extend the proposed technique to explore the design space to determine the best number of voltage levels. It is confirmed from the experiments that the proposed voltage set-up solution reduces energy consumption by 19.2% on average over that of previous technique (Buss et al., 2003).
Sponsorship	Chinese Inst. of Electron
Starting Page	836
Ending Page	841
File Size	1076464
Page Count	6
File Format	PDF
ISBN	0780387368
DOI	10.1109/ASPDAC.2005.1466472
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-01-21
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Dynamic voltage scaling Energy efficiency Voltage control Energy consumption Circuits Frequency Finite impulse response filter Minimization Space exploration Clocks
Content Type	Text
Resource Type	Article

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