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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Gupta, M. Sanchez, F. Llosa, J. |
| Copyright Year | 2007 |
| Description | Author affiliation: Dept. of Comput. Archit., Univ. Politec. de Catalunya, barcelona (Gupta, M.; Sanchez, F.; Llosa, J.) |
| Abstract | Clustered VLIW embedded processors have become widespread due to benefits of simple hardware and low power. However, while some applications exhibit large amounts of instruction level parallelism (ILP) and benefit from very wide machines, others have little ILP, which wastes precious resources in wide processors. Simultaneous multithreading (SMT) is a well known technique that improves resource utilization by exploiting thread level parallelism at the instruction grain level. However, implementing SMT for VLIWs requires complex structures. In this paper, we propose CSMT (cluster-level simultaneous multithreading) to allow some degree of SMT in clustered VLIW processors with minimal hardware cost and complexity. CSMT considers the set of operations that execute simultaneously in a given cluster (named bundle) as the assignment unit. All bundles belonging to a VLIW instruction from a given thread are issued simultaneously. To minimize cluster conflicts between threads, a very simple hardware- based cluster renaming mechanism is proposed. The experimental results show that CSMT significantly improves ILP when compared with other multithreading approaches suited for VLIW. For instance, with 4 threads CSMT shows an average speedup of 113% over a single-thread VLIW architecture and 36% over interleaved multithreading (IMT). In some cases, speedup can be as high as 228% over single thread architecture and 97% over IMT. |
| Starting Page | 121 |
| Ending Page | 128 |
| File Size | 965601 |
| Page Count | 8 |
| File Format | |
| ISBN | 9781424412570 |
| ISSN | 10636404 |
| DOI | 10.1109/ICCD.2007.4601890 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2007-10-07 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Program processors Hardware Multithreading Pipelines Registers Benchmark testing Computer architecture |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electrical and Electronic Engineering Hardware and Architecture |
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