NDLI: A flexible design methodology for analog test wrappers in mixed-signal SOCs

Content Provider	IEEE Xplore Digital Library
Author	Sehgal, A. Ozev, S. Chakrabarty, K.
Copyright Year	2005
Description	Author affiliation: Dept. of Electr. & Comput. Eng., Duke Univ., Durham, NC, USA (Sehgal, A.; Ozev, S.; Chakrabarty, K.)
Abstract	The manufacturing test cost for mixed-signal SOCs is widely recognized to be much higher than that for digital SOCs. It has been shown in recent prior work that the use of analog test wrappers (ATWs) for embedded analog cores in mixed-signal SOCs reduces test cost. ATWs enable analog test using digital test access mechanisms, thereby reducing the need for expensive mixed-signal testers. However, analog cores, which tend to be application-specific, evolve more than digital cores with changes in technology. The ATW specifications are therefore subject to change due to the speed/frequency requirements of the newer and faster analog cores that are embedded in the SOC. These changes in specifications require the redesign of the data converters in an ATW. We propose an automated parameter translation and ATW redesign methodology. We demonstrate the effectiveness of our methodology using a set of analog tests specified for a representative analog core. We further study the tradeoffs between test time and silicon area. Experimental results are presented for three ITC'02 benchmark SOCs that have been augmented with five representative analog cores.
Sponsorship	IEEE Comput. Soc. Design Autom. Tech. Comm. (DATC) IEEE Circuits and Syst. Soc. Cadence Intel
Starting Page	137
Ending Page	142
File Size	462733
Page Count	6
File Format	PDF
ISBN	0769524516
DOI	10.1109/ICCD.2005.8
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-10-02
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Design methodology Costs Computer aided manufacturing Silicon Design optimization Frequency conversion Benchmark testing Design for testability Circuits Contracts
Content Type	Text
Resource Type	Article

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