NDLI: A complexity-effective approach to ALU bandwidth enhancement for instruction-level temporal redundancy

Content Provider	IEEE Xplore Digital Library
Author	Parashar, A. Gurumurthi, S. Sivasubramaniam, A.
Copyright Year	2004
Description	Author affiliation: Dept. of Comput. Sci. & Eng., Pennsylvania State Univ., University Park, PA, USA (Parashar, A.; Gurumurthi, S.; Sivasubramaniam, A.)
Abstract	Previous proposals for implementing instruction-level temporal redundancy in out-of-order cores have reported a performance degradation of up to 45% in certain applications compared to an execution which does not have any temporal redundancy. An important contributor to this problem is the insufficient number of ALUs for handling the amplified load injected into the core. At the same time, increasing the number of ALUs can increase the complexity of the issue logic, which has been pointed out to be one of the most timing critical components of the processor. This paper proposes a novel extension of a prior idea on instruction reuse to ease ALU bandwidth requirements in a complexity-effective way by exploiting certain interesting properties of a dual (temporally redundant) instruction stream. We present microarchitectural extensions necessary for implementing an instruction reuse buffer (IRB) and integrating this with the issue logic of a dual instruction stream superscalar core, and conduct extensive evaluations to demonstrate how well it can alleviate the ALU bandwidth problem. We show that on the average we can gain back nearly 50% of the IPC loss that occurred due to ALU bandwidth limitations for an instruction-level temporally redundant superscalar execution, and 23% of the overall IPC loss.
Sponsorship	ACM SIGARCH IEEE Comput. Soc. TCCA
Starting Page	376
Ending Page	386
File Size	602881
Page Count	11
File Format	PDF
ISBN	0769521436
ISSN	10636897
DOI	10.1109/ISCA.2004.1310789
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-06-23
Publisher Place	Germany
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Bandwidth Redundancy Hardware Out of order Proposals Logic Computer science Degradation Application software Timing
Content Type	Text
Resource Type	Article

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