NDLI: Device Simulation of P-InAlN-Gate AlGaN/GaN high electron mobility transistor

Content Provider	IEEE Xplore Digital Library
Author	Shrestha, N.M. Yueh-Chin Lin Han-Tung Chang Yiming Li Chang, E.Y.
Copyright Year	2014
Description	Author affiliation: Dept. of Electr. & Comput. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan (Han-Tung Chang; Yiming Li) \|\| Dept. of Mater. Sci. & Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan (Shrestha, N.M.; Yueh-Chin Lin; Chang, E.Y.)
Abstract	Enhancement mode AlGaN/GaN high electron mobility transistor with p-InAlN gate is designed and successfully studied its electrical properties. Threshold voltage of the device is 1.9 V, which is required magnitude of threshold voltage for real device. Similarly, the maximum drain current is 520 mA/mm and trasconductance is 183 mS/mm, which is the record estimation for enhancement-mode (e-mode) device with recorded threshold voltage. P-InAlN layer injects hole to the barrier at higher gate voltage and results in comparatively larger drain current. Selective area etching and re-grow AlInN causes thin barrier layer beneath the gate. This recess like p-InAlN structure can reduce the concentration of 2DEG; and thus results the high magnitude of threshold voltage.
Starting Page	1
Ending Page	4
File Size	457308
Page Count	4
File Format	PDF
ISBN	9781479954339
DOI	10.1109/IWCE.2014.6865876
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-06-03
Publisher Place	France
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	HEMTs MODFETs Gallium nitride Aluminum gallium nitride Logic gates Threshold voltage Materials Device simulation Enhancement mode p-AlInN 2 dimensional electron gas High electron mobility transistor
Content Type	Text
Resource Type	Article

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