NDLI: A Flexible VLSI Architecture for Extracting Diversity and Spatial Multiplexing Gains in MIMO Channels

Content Provider	IEEE Xplore Digital Library
Author	Chia-Hsiang Yang Markovic, D.
Copyright Year	2008
Description	Author affiliation: Univ. of California, Los Angeles, CA (Chia-Hsiang Yang; Markovic, D.)
Abstract	The sphere decoding algorithm is able to approach maximum likelihood (ML) detection with significantly reduced computational complexity for multi-input multi-output (MIMO) communications. The computational reduction makes it attractive for hardware implementation. This paper presents a unified sphere decoder architecture that deploys diversity-multiplexing tradeoff in MIMO channels by taking advantage of the flexibility in the number of antennas and modulation schemes. Several signal processing and circuit techniques are constructively combined to reduce the hardware complexity: a 20 times area reduction is achieved even without interleaving of sub-carriers compared to the direct-mapped architecture. The proposed flexible architecture supports antenna arrays from 2x2 to 16x16, modulations from BPSK to 64-QAM, over 16 to 128 sub-carriers. The peak estimated data rate exceeds 1.5 Gbps over a 16 MHz bandwidth in just 0.55 $mm^{2}$ in a standard 90 nm CMOS process.
Starting Page	725
Ending Page	731
File Size	334083
Page Count	7
File Format	PDF
ISBN	9781424420759
DOI	10.1109/ICC.2008.142
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-05-19
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Very large scale integration MIMO Computer architecture Maximum likelihood decoding Maximum likelihood detection Hardware Signal processing algorithms Maximum likelihood estimation Computational complexity Array signal processing
Content Type	Text
Resource Type	Article

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