NDLI: A temperature-insensitive gate-controlled weighted current digital-to-analog converter

Content Provider	IEEE Xplore Digital Library
Author	Namburu, P. Veillette, R. Carletta, J. Ward, M.
Copyright Year	2010
Description	Author affiliation: Sensiics, Tallmadge, OH USA (Ward, M.) \|\| Department of Electrical and Computer Engineering, The University of Akron, OH USA (Namburu, P.; Veillette, R.; Carletta, J.)
Abstract	This paper describes the design and simulation of a temperature-insensitive gate-controlled weighted current digital-to-analog converter (DAC). The DAC design includes CMOS drivers to switch the gates of a set of binary-weighted PMOS current sources. Temperature-insensitive operation is achieved by biasing the PMOS current sources at their zero temperature coefficient (ZTC) voltage. The proposed DAC has been laid out assuming a 0.5-µm silicon-on-insulator technology with approximate die dimensions of 495 µm × 135 µm. Simulations show that the DAC operates over the temperature range of 27°C-125°C with a maximum error of 0.2% in the bit currents. An alternative design with reduced die dimensions of 150 µm × 92 µm has also been implemented, but exhibits degraded performance compared to the first design.
Starting Page	485
Ending Page	488
File Size	436594
Page Count	4
File Format	PDF
ISBN	9781424477715
ISSN	15483746
e-ISBN	9781424477739
DOI	10.1109/MWSCAS.2010.5548739
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-08-01
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Digital-analog conversion Switches Voltage Switching circuits Operational amplifiers Computational modeling Computer simulation Silicon on insulator technology Temperature distribution Temperature sensors
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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