NDLI: Multi-standard carrier generator with CMOS logic divider

Content Provider	IEEE Xplore Digital Library
Author	Seonghan Ryu
Copyright Year	2009
Description	Author affiliation: Department of Information and Communication Engineering, Hannam University, Daejeon, South Korea (Seonghan Ryu)
Abstract	A multi standard carrier generator chain satisfying all requirements of phase noise and frequency range for Quad-band GSM/EDGE and WCDMA standards is presented. It adopts a VCO utilizing bond-wire inductors with high-quality factor, an 8-bit coarse tune capbank for low VCO gain. CMOS logic dividers are also adopted in this LO chain to meet the most stringent phase noise specification of GSM. The proposed divider structure also shows very wide tuning range of self oscillation frequency(0.54 to 2.44GHz). The proposed LO chain is implemented in 0.13 µm CMOS technology. The measured tuning range is about 22% (3.25 to 4.05 GHz). The LO chain exhibits a phase noise of −126, −136 and −164dBc/Hz measured respectively at 400KHz, 1MHz and 20MHz offset from 900MHz Carrier.
Starting Page	1059
Ending Page	1062
File Size	831017
Page Count	4
File Format	PDF
ISBN	9781424444793
ISSN	15483746
DOI	10.1109/MWSCAS.2009.5235984
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-08-02
Publisher Place	Mexico
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	CMOS logic circuits Phase noise GSM Voltage-controlled oscillators Tuning CMOS technology Frequency Multiaccess communication Bonding Inductors
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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