NDLI: A mixed signal wide-band BiCMOS frequency synthesizer for DVB application

Content Provider	IEEE Xplore Digital Library
Author	Peng Yu Jun Yan Yin Shi Fa Foster Dai
Copyright Year	2008
Description	Author affiliation: Dept. of Electr. Comput. Eng., Auburn Univ., Auburn, AL (Fa Foster Dai) \|\| Suzhou-CAS Semicond. Integrated Technol. Res. Center, Suzhou (Peng Yu; Jun Yan; Yin Shi)
Abstract	This paper presents a BiCMOS frequency synthesizer covering frequency range from 500 MHz to 2175 MHz which is fully compatible with DVB-S application. The frequency synthesizer consists of monolithic VCOs, utilizing on-chip symmetric inductor, high speed CML divider built with high performance BJT, and can achieve -80 dBc/Hz, -100 dBc/Hz, -123 dBc/Hz phase noise at 1 KHz, 100 KHz and 1 MHz carrier frequency offset, respectively. The 4 VCOs, which can be tuned from 2 GHz to 4.3 GHz with 20 % tuning range each and a maxim KVCO of 200 MHz/V, is divided by two or four to synthesis the desired DVB-S L-band (0.95-2.15 GHz) or other UHF-band frequency. Measure results show that this design works well over a temperature variation from 0degC to 85degC. The design is implemented with a 0.35 mum SiGe BiCMOS technology.
Starting Page	228
Ending Page	231
File Size	721472
Page Count	4
File Format	PDF
ISBN	9781424427253
ISSN	10889299
DOI	10.1109/BIPOL.2008.4662750
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-10-13
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Voltage-controlled oscillators Noise Phase locked loops Phase noise Frequency synthesizers Temperature measurement Phase frequency detector VCO BiCMOS CML DVB frequency synthesizer PLL SiGe
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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