NDLI: An effective soft module floorplanning algorithm based on sequence pair

Content Provider	IEEE Xplore Digital Library
Author	Jun Cheng Chi Mely Chen Chi
Copyright Year	2002
Description	Author affiliation: Dept. of Electron. Eng., Chung Yuan Christian Univ., Chung Li, Taiwan (Jun Cheng Chi)
Abstract	An effective soft module floorplanning algorithm is proposed. It uses simulated annealing framework based on the sequence pair representation. Because a soft module may have many possible shapes, so it will take long time to find a good solution in simulated annealing method. We proposed a method which finds four candidates of module shape to be chosen in a simulated annealing process for each module. These candidates provide a better choice toward local optimal packing. We combine our method with a fast sequence pair evaluation algorithm and keep the same time complexity nlogn of a sequence pair evaluation. During the simulated annealing process, it either chooses to change the shape of one module or to swap the modules in the sequence pair. We have implemented this algorithm. For all MCNC benchmark soft module floorplanning problems, we have obtained more compact floorplan with much less run time comparing to a previous work . For example, for the MCNC benchmark ami49, our algorithm obtained 0.48% of dead space in 142 seconds using a 440 MHz Ultra10 workstation. The previous work to Lagrangian relaxation approach obtained 7.7% of dead space and 2354 seconds using a 600 MHz Pentium III processor.
Starting Page	54
Ending Page	58
File Size	334687
Page Count	5
File Format	PDF
ISBN	0780374940
DOI	10.1109/ASIC.2002.1158030
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2002-09-25
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Simulated annealing Shape Linear programming Lagrangian functions Timing Workstations Very large scale integration Circuits Design methodology Constraint optimization
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

A heuristic method for module sizing under fixed-outline constraints

Congestion-driven floorplanning by adaptive modular shaping

A linear programming-based algorithm for floorplanning in VLSI design

Overlap elimination in floorplans

Unification Of Budgeting And Placement

ELF-SP - evolutionary algorithm for non-slicing floorplans with soft modules

An Efficient Simulated Annealing Based VLSI Floorplanning Algorithm for Slicing Structure

Optimal cell flipping in placement and floorplanning

Module placement with boundary constraints using the sequence-pair representation

An effective soft module floorplanning algorithm based on sequence pair

Similar Documents

A heuristic method for module sizing under fixed-outline constraints

Congestion-driven floorplanning by adaptive modular shaping

A linear programming-based algorithm for floorplanning in VLSI design

Overlap elimination in floorplans

Unification Of Budgeting And Placement

ELF-SP - evolutionary algorithm for non-slicing floorplans with soft modules

An Efficient Simulated Annealing Based VLSI Floorplanning Algorithm for Slicing Structure

Optimal cell flipping in placement and floorplanning

Module placement with boundary constraints using the sequence-pair representation

An effective soft module floorplanning algorithm based on sequence pair