NDLI: The light at the end of the CMOS tunnel

Content Provider	IEEE Xplore Digital Library
Author	Nassif, S.R.
Copyright Year	2010
Description	Author affiliation: IBM Research, 11501 Burnet Rd., Austin, TX 78757 (Nassif, S.R.)
Abstract	In spite of numerous predictions to the contrary, Silicon technology is marching along past the 22nm node and on to ever finer dimensions. Innovations at the technology device, circuit and system levels continue to enable us to scale in spite of what sometime appear to be insurmountable problems in power, lack of performance, manufacturability and so on. To a large degree, these innovations are necessary because no substitute technology has been found as yet and, in fact, it does not appear likely that any such technology will become practical this decade. This leaves us with the need to anticipate and predict the near and medium term futures of CMOS for the next handful of technology nodes. This talk will focus on doing just that, and will show how an important new constraint on future system scaling is circuit resilience. Resilience is the ability of circuits to operate in spite of challenges like noise, difficult environmental conditions, ageing and manufacturing imperfections. These factors conspire to cause transient or permanent errors that are indistinguishable from traditional "hard" faults typically caused by defects during fabrication. Without significant innovation at the circuit and system levels, the probability of these events can rise quite dramatically. In the area of SRAM, such phenomena have existed for the last three or four technology nodes, but significant investments in this area have indeed allowed continued system level scaling with ever larger on-chip memories. As these same phenomena start attacking integrated circuits more pervasively, there is an urgent need for research and development in this area to avert the problems certain to arise with increased defect rates. This keynote paper explores the link between the old subject of manufacturing variability and its well-known impact on circuit performance, and the new subject of the way that same variability -in the extreme- can cause complete circuit failure. With care, we will find that the light at the end of the CMOS tunnel is the opening of new opportunities to enrich CMOS with new technologies like MEMS, optics, sensors and even biological devices. Otherwise, that light is likely to be another train…
Starting Page	4
Ending Page	9
File Size	535142
Page Count	6
File Format	PDF
ISBN	9781424469666
ISSN	10636268
e-ISBN	9781424469673
e-ISBN	9781424469659
DOI	10.1109/ASAP.2010.5540756
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-07-07
Publisher Place	France
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	CMOS technology Technological innovation Circuits and systems Manufacturing Resilience Optical sensors Silicon Circuit noise Working environment noise Aging
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Optical test pixels implemented in a standard CMOS technology

Innovations to extend CMOS nano-transistors to the limit

CMOS technology: Present and future

RF substrate noise characterization for CMOS 0.18 /spl mu/m

Advancing Moore's law: Challenges and opportunities

Discontinuous Innovation: Strained Silicon Technology

The Design of High Performance Analogue/Digital CMOS LSI

A universal telephone audio circuit with loudhearing and handsfree operation in CMOS technology

Image Sensors

The light at the end of the CMOS tunnel

Similar Documents

Optical test pixels implemented in a standard CMOS technology

Innovations to extend CMOS nano-transistors to the limit

CMOS technology: Present and future

RF substrate noise characterization for CMOS 0.18 /spl mu/m

Advancing Moore's law: Challenges and opportunities

Discontinuous Innovation: Strained Silicon Technology

The Design of High Performance Analogue/Digital CMOS LSI

A universal telephone audio circuit with loudhearing and handsfree operation in CMOS technology

Image Sensors

The light at the end of the CMOS tunnel