NDLI: Analytical SPICE-Compatible Model of Schottky-Barrier-Type GNRFETs With Performance Analysis

Content Provider	IEEE Xplore Digital Library
Author	Gholipour, M. Ying-Yu Chen Sangai, A. Masoumi, N. Deming Chen
Copyright Year	1993
Abstract	This paper presents an accurate analytical compact model for Schottky-barrier-type graphene nanoribbon field-effect transistors (SB-GNRFETs). This is a physics-based analytical model for the current-voltage (I-V) characteristics of SB-GNRFETs. The proposed model considers various design parameters and process variation effects, including graphene-specific line-edge roughness, which allows thorough exploration and evaluation of SB-GNRFET circuits. We develop accurate approximations of SB tunneling, channel charge, and current, which provide accurate results while maintaining model compactness. We evaluate the effect of design parameters and process variations on the performance of SB-GNRFETs. We also compare circuit-level performance of SB-GNRFETs with multigate (MG) Si-CMOS (e.g., FinFETs). Our circuit simulations indicate that SB-GNRFET has an energy-delay product (EDP) advantage over Si-CMOS, although GNR-specific process variation, especially the line-edge roughness, would significantly downgrade such an advantage; the EDP of the ideal SB-GNRFET (assuming no process variation) is ~2.5% of that of Si-CMOS, while the EDP of the nonideal case with process variation is ~68% of that of Si-CMOS. Finally, we study technology scaling with SB-GNRFET and MG Si-CMOS. We show that the EDP of ideal (nonideal) SB-GNRFET is ~0.88% (54%) EDP of that of Si-CMOS as the technology nodes scale down to 7 nm.
Sponsorship	IEEE Computer Society Association for Computing Machinery (ACM)/SIGDA IEEE Computer Society Technical Committee on Design Automation
Starting Page	650
Ending Page	663
Page Count	14
File Size	4053462
File Format	PDF
ISSN	10638210
Volume Number	24
Issue Number	2
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2016-01-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Integrated circuit modeling Approximation methods Computational modeling Tunneling Graphene Analytical models Transistors SPICE model. Graphene nanoribbon field-effect transistor (GNRFET) nanoelectronics Schottky barrier (SB) SPICE model
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Software Hardware and Architecture

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Asymmetric Gate Schottky-Barrier Graphene Nanoribbon FETs for Low-Power Design

A SPICE-Compatible Model of MOS-Type Graphene Nano-Ribbon Field-Effect Transistors Enabling Gate- and Circuit-Level Delay and Power Analysis Under Process Variation

Schottky Barrier Carbon Nanotube Transistor: Compact Modeling, Scaling Study, and Circuit Design Applications

Gate dielectric material dependence of current-voltage characteristics of ballistic Schottky barrier graphene nanoribbon field-effect transistor and carbon nanotube field-effect transistor for different channel lengths

Design of ternary logic gates and circuits using GNRFETs

Schottky-barrier graphene nanoribbon field-effect transistors-based field-programmable gate array's configurable logic block and routing switch

Analytical Current Transport Modeling of Graphene Nanoribbon Tunnel Field-Effect Transistors for Digital Circuit Design

Analytical Model of One-Dimensional Carbon-Based Schottky-Barrier Transistors

Compact Model of Carbon Nanotube Transistor and Interconnect

Analytical SPICE-Compatible Model of Schottky-Barrier-Type GNRFETs With Performance Analysis

Similar Documents

Asymmetric Gate Schottky-Barrier Graphene Nanoribbon FETs for Low-Power Design

A SPICE-Compatible Model of MOS-Type Graphene Nano-Ribbon Field-Effect Transistors Enabling Gate- and Circuit-Level Delay and Power Analysis Under Process Variation

Schottky Barrier Carbon Nanotube Transistor: Compact Modeling, Scaling Study, and Circuit Design Applications

Gate dielectric material dependence of current-voltage characteristics of ballistic Schottky barrier graphene nanoribbon field-effect transistor and carbon nanotube field-effect transistor for different channel lengths

Design of ternary logic gates and circuits using GNRFETs

Schottky-barrier graphene nanoribbon field-effect transistors-based field-programmable gate array's configurable logic block and routing switch

Analytical Current Transport Modeling of Graphene Nanoribbon Tunnel Field-Effect Transistors for Digital Circuit Design

Analytical Model of One-Dimensional Carbon-Based Schottky-Barrier Transistors

Compact Model of Carbon Nanotube Transistor and Interconnect

Analytical SPICE-Compatible Model of Schottky-Barrier-Type GNRFETs With Performance Analysis