NDLI: Ultralow Turn-OFF Loss SOI LIGBT With p-Buried Layer During Inductive Load Switching

Content Provider	IEEE Xplore Digital Library
Author	Yitao He Ming Qiao Xin Zhou Zhaoji Li Bo Zhang
Copyright Year	1963
Abstract	An ultralow turn-OFF loss (EOFF) silicon-oninsulator lateral insulated-gate bipolar transistor with a p-buried layer (PB SOT LTGBT) is first proposed. A universal EOFF model during inductive load turn-OFF is set up, which reveals that low EOFF can be achieved by reducing the total integral current charges, reducing the average anode voltage in the first phase and increasing the charge factor k. Due to the large capacitance effect and extra hole extraction path induced by the PB, the three ideas for low EOFF are demonstrated in the PB SOT LTGBT. Simulation results show that the PB SOT LTGBT can achieve an 85% lower EOFF compared with the conventional SOT LTGBT based on 6-μm SOT layer. Furthermore, the proposed EOFF model can be applied to all the TGBTs, and it reveals the mechanism of low EOFF of the TGBT with a superjunction structure during inductive load switching.
Sponsorship	IEEE Electron Devices Society
Starting Page	3774
Ending Page	3780
Page Count	7
File Size	2524433
File Format	PDF
ISSN	00189383
Volume Number	62
Issue Number	11
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-01-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Silicon-on-insulator Insulated gate bipolar transistors Capacitance Load modeling Anodes Analytical models Switches turn-OFF loss. Lateral insulated-gate bipolar transistor (LIGBT) model p-buried layer (PB) silicon-on-insulator (SOI) turn-OFF loss
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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