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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Chih-Hsiang Ho Hassan, M.K. Soo Youn Kim Roy, K. |
| Copyright Year | 1980 |
| Abstract | For the static random access memories (SRAMs) with high-k/metal gate transistors, positive bias temperature instability (PBTI)-induced stability degradation can be significant. In this letter, we analyze the temporal variations of the READ/WRITE operations and static noise margin of a conventional 6T-SRAM cell using a physics-based PBTI model. We show that the dependence of BTI effects on intrinsic variations and the design parameters of SRAM are significant A 10 mV increase in intrinsic variations can lead to double the BTI-induced read failure rate. Furthermore, SRAM is more sensitive to PBTI effects as compared with negative bias temperature instability These results validate that stochastic modeling of PBTI is required for reliable SRAM design. |
| Sponsorship | IEEE Electron Devices Society |
| Starting Page | 951 |
| Ending Page | 953 |
| Page Count | 3 |
| File Size | 732301 |
| File Format | |
| ISSN | 07413106 |
| Volume Number | 35 |
| Issue Number | 9 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2014-01-01 |
| Publisher Place | U.S.A. |
| Access Restriction | One Nation One Subscription (ONOS) |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Degradation Random access memory Stability analysis MOSFET circuits Thermal stability Logic gates Transistors static noise margin (SNM) Static random access memory (SRAM) positive bias temperature instability (PBTI) negative bias temperature instability (NBTI) |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering |
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