NDLI: Ferroelectric-Assisted Dual-Switching Speed DRAM

Content Provider	IEEE Xplore Digital Library
Author	Rajwade, S.R. Naoi, T.A. Auluck, K. Jayant, K. Van Dover, R.B. Kan, E.C.
Copyright Year	1963
Abstract	This paper presents a novel one-transistor low-voltage DRAM-Flash hybrid memory. The proposed device integrates ferroelectric thin film and nonvolatile charge injection, and demonstrates two modes of operations: 1) a fast (10-100 ns) DRAM mode with ~ 10³ s of retention, associated with ferroelectric switching, and 2) a slower (0.1-1 ms) Flash mode with long retention time, from charge tunneling into the floating nodes. The time evolution of the electric field in the ferroelectric and the tunnel oxide is shown to naturally establish the two-step mechanism during the program operation. The complementary characteristics of ferroelectric switching and gate-charge injection enable low-voltage program/erase (±8 V), reasonable memory window (0.8 V), and long retention time. Devices were fabricated with the lead zirconatetitanate thin film as the ferroelectric layer and Au nanocrystals for gate-injected electron storage. Pulsed programming measurements were also performed to distinguish the memory window obtained from the two mechanisms in DRAM and Flash operations.
Sponsorship	IEEE Electron Devices Society
Starting Page	1944
Ending Page	1950
Page Count	7
File Size	479860
File Format	PDF
ISSN	00189383
Volume Number	60
Issue Number	6
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-01-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Switches Logic gates Random access memory Tunneling Iron Gold Dielectrics hybrid DRAM–flash dual speed ferroelectric (FE)
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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