NDLI: Feedback Biasing in Nanoscale CMOS Technologies

Content Provider	IEEE Xplore Digital Library
Author	Singh, T. Saether, T. Ytterdal, T.
Copyright Year	2004
Abstract	This work rediscovers the attractiveness of feedback biasing when applied to circuits designed in nanoscale CMOS technologies. It is shown that very compact amplifiers can be obtained by utilizing a type of biasing that imposes minimal area overhead. We discuss how the undesired features of the nanoscale CMOS technologies actually help in the revival of this simple biasing method in newer technology generations. The measurement results of prototyped common-source (CS) amplifiers utilizing feedback biasing for application in medical ultrasound imaging systems are presented in this brief. The proposed feedback biasing is also suitable for amplifying signals from high-impedance sources that pose challenges on maintaining high input impedance for the voltage amplifiers while maintaining a very low input capacitance value. Measurements show that the proposed amplifier achieves a voltage gain of 28 dB, an output noise power spectral density of 0.11 (muV)² Hz at center-frequency, and a total harmonic distortion of -30 dB, with the full-scale output at 30 MHz, while drawing 120 muA from a 1-V power supply. The amplifiers were fabricated in 90-nm CMOS technology and measured to be just 20 mum times10 mum.
Sponsorship	IEEE Circuits and Systems Society
Starting Page	349
Ending Page	353
Page Count	5
File Size	337181
File Format	PDF
ISSN	15497747
Volume Number	56
Issue Number	5
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-05-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	CMOS technology Ultrasonic variables measurement Ultrasonic imaging Voltage Distortion measurement Feedback circuits Prototypes Biomedical imaging Impedance Capacitance ultrasonic imaging Capacitive micromachined ultrasonic transducer (CMUT) CMUT interface common-source (CS) amplifier feedback biasing nanoscale CMOS circuits
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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