NDLI: A Highly Efficient Cipher Processor for Dual-Field Elliptic Curve Cryptography

Content Provider	IEEE Xplore Digital Library
Author	Jyu-Yuan Lai Chih-Tsun Huang
Copyright Year	2004
Abstract	This brief presents a high-throughput dual-field elliptic-curve-cryptography (ECC) processor that features all ECC functions with the programmable field and curve parameters over both the prime and binary fields. The proposed architecture is parallel and scalable. Using 0.13-mum CMOS technology, the core size of the processor is 1.44 mm² . The measured results show that our ECC processor can perform one 160-bit point scalar multiplication with coordinate conversion over the prime field in 608 mus at 121 MHz with only 70.0 mW and the binary field in 372 mus at 146 MHz with 82.1 mW. The ECC processor chip outperforms other ECC hardware designs in terms of functionality, scalability, performance, cost effectiveness, and power consumption. In addition, the system analysis shows that our design is very efficient, compared with the software implementation for realistic security applications.
Sponsorship	IEEE Circuits and Systems Society
Starting Page	394
Ending Page	398
Page Count	5
File Size	389373
File Format	PDF
ISSN	15497747
Volume Number	56
Issue Number	5
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-05-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Elliptic curve cryptography CMOS technology CMOS process Coordinate measuring machines Semiconductor device measurement Performance evaluation Hardware Scalability Cost function Energy consumption very large scale integration (VLSI) hardware implementation Binary field dual field elliptic curve cryptography (ECC) prime field public-key cryptography
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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