NDLI: Analysis of Trapped Charges in Dopant-Segregated Schottky Barrier-Embedded FinFET SONOS Devices

Content Provider	IEEE Xplore Digital Library
Author	Sung-Jin Choi Jin-Woo Han Moongyu Jang Yang-Kyu Choi
Copyright Year	1980
Abstract	The aim of this letter is to analyze the spatial distribution of trapped charges in the type of dopant-segregated Schottky barrier (DSSB)-embedded FinFET SONOS devices used in NAND-type flash memory. Due to localized programming by carrier injection with extra kinetic energy, the spatial distribution of electrons trapped in an O/N/O layer of a DSSB SONOS device after a short time of programming differs from that in an O/N/O layer of a conventional SONOS device, which results in the degradation of subthreshold slope (SS). Note that the degraded SS recovers as the program time increases. The measured and simulated data confirm that the high speed of the programming is due largely to the localized trapped charges injected from DSSB source/drain junctions.
Sponsorship	IEEE Electron Devices Society
Starting Page	1084
Ending Page	1086
Page Count	3
File Size	491272
File Format	PDF
ISSN	07413106
Volume Number	30
Issue Number	10
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-10-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	FinFETs SONOS devices Decision support systems Electron traps Degradation Schottky barriers Flash memory Kinetic energy Current measurement Velocity measurement subthreshold slope (SS) Dopant-segregated Schottky barrier (DSSB) dopant segregation FinFET localized trapping Schottky barrier SONOS
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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