NDLI: The impact of process noise on VLSI process improvement

Content Provider	IEEE Xplore Digital Library
Author	Bohn, R.E.
Copyright Year	1988
Abstract	Process improvement is critical to commercial success in VLSI fabrication, especially during ramp-up. This paper investigates one of the factors-process noise-that drives the success of process improvement. Split-lot controlled experiments are vulnerable to confounding by experimental noise, caused by process variability. Fabs with low noise levels have a higher potential for learning (and hence improving their production processes) than high noise fabs. Detailed probe yield data from five semiconductor fabs were examined to estimate process noise levels. A bootstrap simulation was used to estimate the error rates of identical controlled experiments conducted in each fab. Absolute noise levels were high for all but the best fabs, leading to lost learning. The magnitude of lost learning is estimated numerically; it ranges from ten percent to above one hundred percent of the theoretically possible learning in an experiment. In some cases, experiments are little better than coin flipping. Standard statistical methods are either expensive or ineffective for dealing with these high noise levels. Some alternative nonstatistical countermeasures are recommended.<>
Sponsorship	IEEE Electron Devices Society IEEE Components, Packaging, and Manufacturing Technology Society IEEE Reliability Society IEEE Solid-State Circuits Society
Starting Page	228
Ending Page	238
Page Count	11
File Size	1234670
File Format	PDF
ISSN	08946507
Volume Number	8
Issue Number	3
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1995-08-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Very large scale integration Noise level Production Semiconductor device noise Fabrication Error analysis Sampling methods Probes Yield estimation Statistical analysis
Content Type	Text
Resource Type	Article
Subject	Industrial and Manufacturing Engineering Condensed Matter Physics Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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