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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Usami, A. Kaneko, K. Fujii, Y. Ichimura, M. |
| Copyright Year | 1963 |
| Abstract | Electrical properties of the bonded silicon on insulator (SOI) wafer and characteristics of PIN photodiodes fabricated on the SOI layer were evaluated. A trap with deep energy level (about Ec-Et=0.55 eV) was observed in the SOI layer with 100 /spl mu/m- and 30 /spl mu/m-thickness using the deep level transient spectroscopy (DLTS) method. No trap was detected in the SOI layer with 10 /spl mu/m-thickness. This deep trap was not observed before the wafer bonding process and thus the trap is generated during the wafer bonding process. From primary mode lifetime (/spl tau//sub 1/) measurements, it is considered that the trap will works as the generation center or the recombination center. For PIN photodiodes on the SOI layer in which the trap was detected, the increases of dark current were observed. Spectral responses of photodiodes on the SOI layer were almost the same as that on the normal FZ-Si wafer. We fabricated PIN photodiodes with good spectral response.< |
| Sponsorship | IEEE Electron Devices Society |
| Starting Page | 239 |
| Ending Page | 243 |
| Page Count | 5 |
| File Size | 451083 |
| File Format | |
| ISSN | 00189383 |
| Volume Number | 42 |
| Issue Number | 2 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1995-02-01 |
| Publisher Place | U.S.A. |
| Access Restriction | One Nation One Subscription (ONOS) |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Silicon on insulator technology Wafer bonding PIN photodiodes Conductivity Epitaxial layers Spectroscopy Energy states Dark current Fabrication Costs |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering |
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