NDLI: High performance poly-Si TFTs fabricated using pulsed laser annealing and remote plasma CVD with low temperature processing

Content Provider	IEEE Xplore Digital Library
Author	Kohno, A. Sameshima, T. Sano, N. Sekiya, M. Hara, M.
Copyright Year	1963
Abstract	Key technologies for fabricating polycrystalline silicon thin film transistors (poly-Si TFTs) at a low temperature are discussed. Hydrogenated amorphous silicon films were crystallized by irradiation of a 30 ns-pulsed XeCl excimer laser. Crystalline grains were smaller than 100 nm. The density of localized trap states in poly-Si films was reduced to 4/spl times/10/sup 16/ cm/sup -3/ by plasma hydrogenation only for 30 seconds. Remote plasma chemical vapor deposition (CVD) using mesh electrodes realized a good interface of SiO/sub 2//Si with the interface trap density of 2.0/spl times/10/sup 10/ cm/sup -2/ eV/sup -1/ at 270/spl deg/C. Poly-Si TFTs were fabricated at 270/spl deg/C using laser crystallization, plasma hydrogenation and remote plasma CVD. The carrier mobility was 640 cm/sup 2//Vs for n-channel TFTs and 400 cm/sup 2//Vs for p-channel TFTs. The threshold voltage was 0.8 V for n-channel TFTs and -1.5 V for p-channel TFTs. The leakage current of n-channel poly-Si TFTs was reduced from 2/spl times/10/sup -10/ A//spl mu/m to 3/spl times/10/sup -13/ A//spl mu/m at the gate voltage of -5 V using an offset gate electrode with an offset length of 1 /spl mu/m.<>
Sponsorship	IEEE Electron Devices Society
Starting Page	251
Ending Page	257
Page Count	7
File Size	689575
File Format	PDF
ISSN	00189383
Volume Number	42
Issue Number	2
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1995-02-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Optical pulses Thin film transistors Plasma density Crystallization Pulsed laser deposition Plasma temperature Plasma chemistry Electrodes Amorphous silicon Semiconductor films
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Low-temperature polysilicon thin-film transistors fabricated from laser-processed sputtered-silicon films

High-performance TFTs fabricated by XeCl excimer laser annealing of hydrogenated amorphous-silicon film

Thin-film transistors fabricated with poly-Si films crystallized at low temperature by microwave annealing

High performance poly-crystalline silicon thin film transistors fabricated using remote plasma chemical vapor deposition of SiO/sub 2/

Strained Single-Grain Silicon n- and p-Channel Thin-Film Transistors by Excimer Laser

Defect Passivation in Poly-Si TFTs by Ion Implantation and Pulsed Laser Annealing

Source-gated transistors in poly-silicon

Crystallization of Double-Layered Silicon Thin Films by Solid Green Laser Annealing for High-Performance Thin-Film Transistors

Hydrogen dilution effect on the properties of coplanar amorphous silicon thin-film transistors fabricated by inductively-coupled plasma CVD

High performance poly-Si TFTs fabricated using pulsed laser annealing and remote plasma CVD with low temperature processing

Similar Documents

Low-temperature polysilicon thin-film transistors fabricated from laser-processed sputtered-silicon films

High-performance TFTs fabricated by XeCl excimer laser annealing of hydrogenated amorphous-silicon film

Thin-film transistors fabricated with poly-Si films crystallized at low temperature by microwave annealing

High performance poly-crystalline silicon thin film transistors fabricated using remote plasma chemical vapor deposition of SiO/sub 2/

Strained Single-Grain Silicon n- and p-Channel Thin-Film Transistors by Excimer Laser

Defect Passivation in Poly-Si TFTs by Ion Implantation and Pulsed Laser Annealing

Source-gated transistors in poly-silicon

Crystallization of Double-Layered Silicon Thin Films by Solid Green Laser Annealing for High-Performance Thin-Film Transistors

Hydrogen dilution effect on the properties of coplanar amorphous silicon thin-film transistors fabricated by inductively-coupled plasma CVD

High performance poly-Si TFTs fabricated using pulsed laser annealing and remote plasma CVD with low temperature processing