NDLI: Improvement of Mechanical Reliability of 3D Electronic Packaging by Controlling the Mechanical Properties of Electroplated Materials

Content Provider	The American Society of Mechanical Engineers (ASME) Digital Collection
Author	Suzuki, Ken Miura, Hideo
Copyright Year	2013
Abstract	Three-dimensional (3D) integration of silicon microelectronic devices improves the electronic functions of devices and minimizes packaging density drastically. A through-silicon via (TSV) structure is indispensable for maximizing the density of interconnections among the stacked silicon chips. However, since the TSV structure is surrounded by silicon, and there is large mismatch in materials properties between metallic materials used for the TSV structure and silicon, thermal stress is essentially generated around the TSV structure during their fabrication process and operating conditions. Recently, electroplated copper thin films have started to be applied to the interconnection material in the TSV structure because of its low electric resistivity and high thermal conductivity. However, the electrical resistivity of the electroplated copper thin films surrounded by SiO2 was found to vary drastically comparing with those of the conventional bulk material. This was because that the electroplated copper thin films consisted of grains with low crystallinity and grain boundaries, in other words, abnormally high defect density. Thus, both the crystallinity and electrical properties of the TSV structure was investigated quantitatively by changing their electroplating conditions and thermal history after the electroplating. It was observed that many voids and hillocks appeared in the TSV structures depending on the electroplating conditions. It was also found that the stress-induced migration occurred after the high temperature annealing which was introduced for improving the crystallinity of the electroplated films. Therefore, it is very important to evaluate the crystallographic quality of the electroplated copper thin films after electroplating to assure both the mechanical and electrical properties of the films.
File Format	PDF
ISBN	9780791856390
DOI	10.1115/IMECE2013-65539
Volume Number	Volume 10: Micro- and Nano-Systems Engineering and Packaging
Conference Proceedings	ASME 2013 International Mechanical Engineering Congress and Exposition
Language	English
Publisher Date	2013-11-15
Publisher Place	San Diego, California, USA
Access Restriction	Subscribed
Subject Keyword	Bulk solids Grain boundaries Annealing Electrical properties Mechanical properties Microelectronic devices High temperature Electroplating Density Silicon chips Stress Thin films Electrical resistivity Electronic packaging Materials properties Packaging density (electronics) Thermal conductivity Silicon Manufacturing Copper Reliability Thermal stresses
Content Type	Text
Resource Type	Article

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