NDLI: Structured/platform ASIC apprentices: which platform will survive your board room?

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Structured/platform ASIC apprentices: which platform will survive your board room?

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Structured/platform ASIC apprentices: which platform will survive your board room?

Content Provider	ACM Digital Library
Author	Hamlin, Chris Bolson, Ivo Leibson, Steve Wilson, Ron Tobias, Rich Gianelli, Joe Camposano, Raul McElvain, Ken
Abstract	Moore's law delivers higher performance and lower cost for FPGAs and ASICs alike, but at the 90nm process node and below, design schedules using the traditional cell-based ASIC design methodology hit a wall of uncertainty. At 90nm and below an emerging alternative ASIC design platform is either Platform ASIC or FPGAs. Which way will the cell-based ASIC designer turn for their next design?Over time, FPGAs and structured/platform ASICs are together poised to replace today's cell-based ASIC market, but which is the real answer to future digital design? Can companies really use these platforms to achieve the system cost reduction and functionality that they need to stay competitive? Which applications will migrate to these platforms the fastest? Is it possible to just tweak the existing cell-based methodology to more efficiently reach the benefits of 90nm process nodes and below? This lively panel will discuss whether it is FPGAs, structured/platform ASICs, or something else that stand to gain the most ground from the projected \$25B ASIC market, and why.
Starting Page	887
Ending Page	888
Page Count	2
File Format	PDF
ISBN	1595930582
DOI	10.1145/1065579.1065811
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2005-06-13
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Digital design Programmable asic platforms
Content Type	Text
Resource Type	Article

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