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| Content Provider | ACM Digital Library |
|---|---|
| Author | Yongtao, Su Jinglin, Shi Juan, Han Gang, Sun Ziyuan, Zhu Shan, Tang |
| Abstract | This paper presents an ASP (application specific processor) with 512-bit SIMD (Single Instruction Multiple Data) and 192-bit VLIW (Very Long Instruction Word) architecture optimized for wireless baseband processing. It employs optimized architecture and address generation unit to accelerate the kernel algorithms. Based on the ASP, a multi-core baseband processor is developed which can work at 2x2 MIMO and 20 MHz physical bandwidth configuration for LTE inner receiver and meet requirements of Category 3 User Equipment (CAT3 UE). Furthermore, a silicon implementation of the baseband processor with 130nm CMOS technology is presented. Experimental results show that the baseband processor provides 100 GOPS computing ability at 117.6MHz. |
| Starting Page | 121 |
| Ending Page | 124 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781450321532 |
| Language | English |
| Publisher | Association for Computing Machinery (ACM) |
| Publisher Date | 2013-03-18 |
| Publisher Place | San Jose |
| Access Restriction | Subscribed |
| Subject Keyword | Application specific processor Lte Vliw Baseband processor Agu |
| Content Type | Text |
| Resource Type | Article |
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