NDLI: Exploiting multithreaded architectures to improve the hash join operation

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Content Provider	ACM Digital Library
Author	Hammad, Moustafa A. Hassanein, Wessam M. Rashid, Layali
Abstract	As database management systems gain importance in our everyday life, it is essential to have efficient implementations of important database operations such as the hash join. Improvements in processor architectures including simultaneous multithreaded architectures and Chip Multiprocessors have opened opportunities for taking advantage of the new multithreaded hardware. Recently, several efforts have been done to enhance database performance through architecture-aware data management. In this paper, we present a new architecture-aware hash join (AA_HJ) algorithm for main memory database systems, where all the data resides in memory. AA_HJ relies on sharing critical structures at the cache level, and distributing the load evenly between threads. Our timing results show a performance improvement up to 2.9x for the Intel® Pentium® 4 HT and up to 4.6x on the Intel® Quad Xeon® Dual-Core machine, compared to single-threaded hash join. The L2 load miss rate is reduced by up 82%.
Starting Page	46
Ending Page	53
Page Count	8
File Format	PDF
ISBN	9781605582436
DOI	10.1145/1509084.1509091
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2008-10-26
Publisher Place	New York
Access Restriction	Subscribed
Content Type	Text
Resource Type	Article

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Exploiting multithreaded architectures to improve the hash join operation