NDLI: WAYPOINT: scaling coherence to thousand-core architectures

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WAYPOINT: scaling coherence to thousand-core architectures

Content Provider	ACM Digital Library
Author	Lumettta, Steven S. Patel, Sanjay J. Kelm, John H. Johnson, Matthew R.
Abstract	In this paper, we evaluate a set of coherence architectures in the context of a 1024-core chip multiprocessor (CMP) tailored to throughput-oriented parallel workloads. Based on our analysis, we develop and evaluate two techniques for scaling coherence to thousand-core CMPs. We find that a broadcast-based probe filtering scheme provides reasonable performance up to 128 cores for some benchmarks, but is not generally scalable. We propose a broadcast-collective network for accelerating probe filter misses, which extends scalability but falls short of supporting 1024 cores. We find that a sparse directory with an invalidate-on-evict policy can work well for many throughput-oriented workloads. However, the on-die structures required to achieve good performance carry a large performance and power overhead. To achieve thousand-core scalability with smaller and less associative sparse directories, we introduce WayPoint, a mechanism that increases directory associativity and capacity dynamically. Using less than 3% of total die area, Way-Point achieves performance within 4% of an infinitely large on-die directory.
Starting Page	99
Ending Page	110
Page Count	12
File Format	PDF
ISBN	9781450301787
DOI	10.1145/1854273.1854291
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2010-09-11
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Cache coherence Accelerator architecture Probe filtering
Content Type	Text
Resource Type	Article

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