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| Content Provider | ACM Digital Library |
|---|---|
| Author | Huang, Zhining Malik, Sharad Araujo, Guido Moreano, Nahri |
| Abstract | Recent work in reconfigurable computing research has shown that a substantial performance speedup can be achieved through architectures that map the most relevant application inner-loops to a reconfigurable datapath. Any solution to this problem must be able to synthesize a datapath for each loop and to merge them together into a single reconfigurable datapath. The main contribution of this paper is a novel graph-based technique for the datapath merge problem. This approach is based on the solution of a maximum clique problem that merges datapaths one at a time. A set of experiments, using the MediaBench benchmark, shows that the proposed technique produces 24% fewer datapath interconnections than a previous solution to this problem. |
| Starting Page | 38 |
| Ending Page | 43 |
| Page Count | 6 |
| File Format | |
| ISBN | 1581135769 |
| DOI | 10.1145/581199.581210 |
| Language | English |
| Publisher | Association for Computing Machinery (ACM) |
| Publisher Date | 2002-10-02 |
| Publisher Place | New York |
| Access Restriction | Subscribed |
| Subject Keyword | Reconfigurable computing High level and architectural synthesis |
| Content Type | Text |
| Resource Type | Article |
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