NDLI: Multiprocessor mapping of process networks: a JPEG decoding case study

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Multiprocessor mapping of process networks: a JPEG decoding case study

Content Provider	ACM Digital Library
Author	de Kock, E. A.
Abstract	We present a system-level design and programming method for embedded multiprocessor systems. The aim of the method is to improve the design time and design quality by providing a structured approach for implementing process networks. We use process networks as re-usable and architecture-independent functional specifications. The method facilitates the cost-driven and constraint-driven source code transformation of process networks into architecture-specific implementations in the form of communicating tasks. We apply the method to implement a JPEG decoding process network in software on a set of MIPS processors. We apply three transformations to optimize synchronization rates and data transfers and to exploit data parallelism for this target architecture. We evaluate the impact of the source code transformations and the performance of the resulting implementations in terms of design time, execution time, and code size. The results show that process networks can be implemented quickly and efficiently on embedded multiprocessor systems.
Starting Page	68
Ending Page	73
Page Count	6
File Format	PDF
ISBN	1581135769
DOI	10.1145/581199.581216
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2002-10-02
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Data parallelism Multiprocessor mapping Process network System design method Code transformation Task-level parallelism
Content Type	Text
Resource Type	Article

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