NDLI: Mitigating FPGA interconnect soft errors by in-place LUT inversion

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Mitigating FPGA interconnect soft errors by in-place LUT inversion

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Mitigating FPGA interconnect soft errors by in-place LUT inversion

Content Provider	ACM Digital Library
Author	Jing, Naifeng Mao, Zhigang Lee, Ju-Yueh He, Lei He, Weifeng
Abstract	Modern SRAM-based FPGAs (Field Programmable Gate Arrays) use multiplexer-based unidirectional routing, and SRAM configuration cells in these multiplexers contribute to the majority of soft errors in FPGAs. In this paper, we formulate an In-Placed inVersion (IPV) on LUT (Look-Up Table) logic polarities to reduce the Soft Error Rate (SER) at chip level, and reveal a locality and NP-Hardness of the IPV problem. We then develop an exact algorithm based on the binary integer linear programming (ILP) and also a heuristic based on the simulated annealing (SA), both enabled by the locality. We report results for the 10 largest MCNC combinational benchmarks synthesized by ABC and then placed and routed by VPR. The results show that IPV obtains close to 4x chip level SER reduction on average and SA is highly effective by obtaining the same SER reduction as ILP does. A recent work IPD has the largest LUT level SER reduction of 2.7x in literature, but its chip level SER reduction is merely 7% due to the dominance of interconnects. In contrast, SA-based IPV obtains nearly 4x chip level SER reduction and runs 30x faster. Furthermore, combining IPV and IPD leads to a chip level SER reduction of 5.3x. This does not change placement and routing, and does not affect design closure. To the best of our knowledge, our work is the first in-depth study on SER reduction for modern multiplexer-based FPGA routing by in-placed logic re-synthesis.
Starting Page	582
Ending Page	586
Page Count	5
File Format	PDF
ISBN	9781457713989
ISSN	10923152
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2011-11-07
Access Restriction	Subscribed
Subject Keyword	Sram-based fpga Interconnect Logic polarity Ser Fault mitigation Logic re-synthesis Soft errors Routing
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Software Computer Science Applications

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